| Message ID | 20230829182500.61875-1-namcaov@gmail.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 8cb22bec142624d21bc85ff96b7bad10b6220e6a |
| Headers | show |
| Series | riscv: kprobes: allow writing to x0 | expand |
| Context | Check | Description |
|---|---|---|
| conchuod/cover_letter | success | Single patches do not need cover letters |
| conchuod/tree_selection | success | Guessed tree name to be fixes at HEAD ef21fa7c198e |
| conchuod/fixes_present | success | Fixes tag present in non-next series |
| conchuod/maintainers_pattern | success | MAINTAINERS pattern errors before the patch: 4 and now 4 |
| conchuod/verify_signedoff | success | Signed-off-by tag matches author and committer |
| conchuod/kdoc | success | Errors and warnings before: 0 this patch: 0 |
| conchuod/build_rv64_clang_allmodconfig | success | Errors and warnings before: 9 this patch: 9 |
| conchuod/module_param | success | Was 0 now: 0 |
| conchuod/build_rv64_gcc_allmodconfig | success | Errors and warnings before: 9 this patch: 9 |
| conchuod/build_rv32_defconfig | success | Build OK |
| conchuod/dtb_warn_rv64 | success | Errors and warnings before: 12 this patch: 12 |
| conchuod/header_inline | success | No static functions without inline keyword in header files |
| conchuod/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 8 lines checked |
| conchuod/build_rv64_nommu_k210_defconfig | success | Build OK |
| conchuod/verify_fixes | success | Fixes tag looks correct |
| conchuod/build_rv64_nommu_virt_defconfig | success | Build OK |
On Tue, Aug 29, 2023 at 08:25:00PM +0200, Nam Cao wrote: > Instructions can write to x0, so we should simulate these instructions > normally. > > Currently, the kernel hangs if an instruction who writes to x0 is > simulated. > > Fixes: c22b0bcb1dd0 ("riscv: Add kprobes supported") > Cc: stable@vger.kernel.org > Signed-off-by: Nam Cao <namcaov@gmail.com> > --- > arch/riscv/kernel/probes/simulate-insn.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/riscv/kernel/probes/simulate-insn.c b/arch/riscv/kernel/probes/simulate-insn.c > index d3099d67816d..6c166029079c 100644 > --- a/arch/riscv/kernel/probes/simulate-insn.c > +++ b/arch/riscv/kernel/probes/simulate-insn.c > @@ -24,7 +24,7 @@ static inline bool rv_insn_reg_set_val(struct pt_regs *regs, u32 index, > unsigned long val) > { > if (index == 0) > - return false; > + return true; > else if (index <= 31) > *((unsigned long *)regs + index) = val; > else > -- > 2.34.1 > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv Thank you for this change. simulate_auipc would previously fail with an rd = 0 which made sense because auipc it is defined as a HINT in the riscv spec when rd = 0, but QEMU and spike don't say it is an illegal instruction so I think it is okay to make this change. Reviewed-by: Charlie Jenkins <charlie@rivosinc.com>
On Wed, Aug 30, 2023 at 2:25 AM Nam Cao <namcaov@gmail.com> wrote: > > Instructions can write to x0, so we should simulate these instructions > normally. > > Currently, the kernel hangs if an instruction who writes to x0 is > simulated. > > Fixes: c22b0bcb1dd0 ("riscv: Add kprobes supported") > Cc: stable@vger.kernel.org > Signed-off-by: Nam Cao <namcaov@gmail.com> > --- > arch/riscv/kernel/probes/simulate-insn.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/riscv/kernel/probes/simulate-insn.c b/arch/riscv/kernel/probes/simulate-insn.c > index d3099d67816d..6c166029079c 100644 > --- a/arch/riscv/kernel/probes/simulate-insn.c > +++ b/arch/riscv/kernel/probes/simulate-insn.c > @@ -24,7 +24,7 @@ static inline bool rv_insn_reg_set_val(struct pt_regs *regs, u32 index, > unsigned long val) > { > if (index == 0) > - return false; > + return true; Acked-by: Guo Ren <guoren@kernel.org> > else if (index <= 31) > *((unsigned long *)regs + index) = val; > else > -- > 2.34.1 >
Hello: This patch was applied to riscv/linux.git (for-next) by Palmer Dabbelt <palmer@rivosinc.com>: On Tue, 29 Aug 2023 20:25:00 +0200 you wrote: > Instructions can write to x0, so we should simulate these instructions > normally. > > Currently, the kernel hangs if an instruction who writes to x0 is > simulated. > > Fixes: c22b0bcb1dd0 ("riscv: Add kprobes supported") > Cc: stable@vger.kernel.org > Signed-off-by: Nam Cao <namcaov@gmail.com> > > [...] Here is the summary with links: - riscv: kprobes: allow writing to x0 https://git.kernel.org/riscv/c/8cb22bec1426 You are awesome, thank you!
diff --git a/arch/riscv/kernel/probes/simulate-insn.c b/arch/riscv/kernel/probes/simulate-insn.c index d3099d67816d..6c166029079c 100644 --- a/arch/riscv/kernel/probes/simulate-insn.c +++ b/arch/riscv/kernel/probes/simulate-insn.c @@ -24,7 +24,7 @@ static inline bool rv_insn_reg_set_val(struct pt_regs *regs, u32 index, unsigned long val) { if (index == 0) - return false; + return true; else if (index <= 31) *((unsigned long *)regs + index) = val; else
Instructions can write to x0, so we should simulate these instructions normally. Currently, the kernel hangs if an instruction who writes to x0 is simulated. Fixes: c22b0bcb1dd0 ("riscv: Add kprobes supported") Cc: stable@vger.kernel.org Signed-off-by: Nam Cao <namcaov@gmail.com> --- arch/riscv/kernel/probes/simulate-insn.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)