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[v2,00/15] arm64: dts: meson: a1: introduce several peripheral IPs

Message ID 20230823213630.12936-1-ddrokosov@sberdevices.ru (mailing list archive)
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Series arm64: dts: meson: a1: introduce several peripheral IPs | expand

Message

Dmitry Rokosov Aug. 23, 2023, 9:36 p.m. UTC 
This patch series introduces device tree declarations for various
peripheral IPs of the A1 SoC family, including clock controllers, EFUSE,
USB, SPI Flash Controller, SDIO, and UART_AO:
    - CLK: A1 SoC has four types on the board, namely PLL, Peripherals,
      CPU, and Audio, but only Amlogic A1 PLL and Peripherals clock
      controllers are currently supported.
    - EFUSE: consists of a 4k bit One Time Programmable (OTP) memory
      divided into 32 128-bit blocks, and data is accessed using the APB
      bus through software or the Key-ladder integrated with the EFUSE
      block.
    - USB: only one USB 2.0 high-speed port is available in the A1 SoC,
      supporting both HOST and DEVICE modes for OTG.
    - SPI Flash Controller: 4-bit QPI/SPI NOR Flash or NAND FLASH
      controller.
    - SDIO: for WiFi/IEEE802.11 connection.
    - UART_AO: for Bluetooth connection.
    - HWRNG: hardware random generator integrated into SoC.
    - AO SECURE: board info registers.

The above peripherals are integrated to new AD402 board device tree.

Changes v2 since v1 at [1]:
    - reorder meson-a1 dtsi includes to keep them sorted
    - remove extra empty lines
    - purge the unnecessary 'okay' status
    - reorder all device tree nodes (existing and new) sorted by 'reg'
      values
    - introduce new saradc definition
    - add hwrng dts node
    - provide ao secure dts node with board info registers
    - include all changes to new AD402 board device tree
    - add AD402 board to bindings

Links:
    [1] https://lore.kernel.org/all/20230607201641.20982-1-ddrokosov@sberdevices.ru/

Alexey Romanov (3):
  arm64: dts: meson: a1: enable efuse controller and setup its clk
  arm64: dts: meson: a1: add hw rng node
  arm64: dts: meson: a1: add ao secure node

Dmitry Rokosov (8):
  arm64: dts: meson: a1: reorder includes to keep them sorted
  arm64: dts: meson: a1: remove extra empty line before reset node
  arm64: dts: meson: a1: remove the unnecessary 'okay' status pwrc value
  arm64: dts: meson: a1: reorder gpio_intc node definition
  arm64: dts: meson: a1: introduce PLL and Peripherals clk controllers
  arm64: dts: meson: a1: support USB controller in OTG mode
  arm64: dts: introduce Amlogic AD402 reference board based on A113L SoC
  dt-bindings: arm: amlogic: add Amlogic AD402 bindings

George Stark (1):
  arm64: dts: meson: a1: add saradc definition

Jan Dakinevich (1):
  arm64: dts: meson: a1: add eMMC controller and its pins

Martin Kurbanov (1):
  arm64: dts: meson: a1: introduce SPI Flash Controller

Oleg Lyovin (1):
  arm64: dts: meson: a1: introduce UART_AO mux definitions

 .../devicetree/bindings/arm/amlogic.yaml      |   1 +
 arch/arm64/boot/dts/amlogic/Makefile          |   1 +
 .../arm64/boot/dts/amlogic/meson-a1-ad402.dts | 145 ++++++++++++
 arch/arm64/boot/dts/amlogic/meson-a1.dtsi     | 213 +++++++++++++++++-
 4 files changed, 348 insertions(+), 12 deletions(-)
 create mode 100644 arch/arm64/boot/dts/amlogic/meson-a1-ad402.dts

Comments

Neil Armstrong Sept. 8, 2023, 12:34 p.m. UTC | #1 
On 23/08/2023 23:36, Dmitry Rokosov wrote:
> This patch series introduces device tree declarations for various
> peripheral IPs of the A1 SoC family, including clock controllers, EFUSE,
> USB, SPI Flash Controller, SDIO, and UART_AO:
>      - CLK: A1 SoC has four types on the board, namely PLL, Peripherals,
>        CPU, and Audio, but only Amlogic A1 PLL and Peripherals clock
>        controllers are currently supported.
>      - EFUSE: consists of a 4k bit One Time Programmable (OTP) memory
>        divided into 32 128-bit blocks, and data is accessed using the APB
>        bus through software or the Key-ladder integrated with the EFUSE
>        block.
>      - USB: only one USB 2.0 high-speed port is available in the A1 SoC,
>        supporting both HOST and DEVICE modes for OTG.
>      - SPI Flash Controller: 4-bit QPI/SPI NOR Flash or NAND FLASH
>        controller.
>      - SDIO: for WiFi/IEEE802.11 connection.
>      - UART_AO: for Bluetooth connection.
>      - HWRNG: hardware random generator integrated into SoC.
>      - AO SECURE: board info registers.
> 
> The above peripherals are integrated to new AD402 board device tree.
> 
> Changes v2 since v1 at [1]:
>      - reorder meson-a1 dtsi includes to keep them sorted
>      - remove extra empty lines
>      - purge the unnecessary 'okay' status
>      - reorder all device tree nodes (existing and new) sorted by 'reg'
>        values
>      - introduce new saradc definition
>      - add hwrng dts node
>      - provide ao secure dts node with board info registers
>      - include all changes to new AD402 board device tree
>      - add AD402 board to bindings
> 
> Links:
>      [1] https://lore.kernel.org/all/20230607201641.20982-1-ddrokosov@sberdevices.ru/
> 
> Alexey Romanov (3):
>    arm64: dts: meson: a1: enable efuse controller and setup its clk
>    arm64: dts: meson: a1: add hw rng node
>    arm64: dts: meson: a1: add ao secure node
> 
> Dmitry Rokosov (8):
>    arm64: dts: meson: a1: reorder includes to keep them sorted
>    arm64: dts: meson: a1: remove extra empty line before reset node
>    arm64: dts: meson: a1: remove the unnecessary 'okay' status pwrc value
>    arm64: dts: meson: a1: reorder gpio_intc node definition
>    arm64: dts: meson: a1: introduce PLL and Peripherals clk controllers
>    arm64: dts: meson: a1: support USB controller in OTG mode
>    arm64: dts: introduce Amlogic AD402 reference board based on A113L SoC
>    dt-bindings: arm: amlogic: add Amlogic AD402 bindings
> 
> George Stark (1):
>    arm64: dts: meson: a1: add saradc definition
> 
> Jan Dakinevich (1):
>    arm64: dts: meson: a1: add eMMC controller and its pins
> 
> Martin Kurbanov (1):
>    arm64: dts: meson: a1: introduce SPI Flash Controller
> 
> Oleg Lyovin (1):
>    arm64: dts: meson: a1: introduce UART_AO mux definitions
> 
>   .../devicetree/bindings/arm/amlogic.yaml      |   1 +
>   arch/arm64/boot/dts/amlogic/Makefile          |   1 +
>   .../arm64/boot/dts/amlogic/meson-a1-ad402.dts | 145 ++++++++++++
>   arch/arm64/boot/dts/amlogic/meson-a1.dtsi     | 213 +++++++++++++++++-
>   4 files changed, 348 insertions(+), 12 deletions(-)
>   create mode 100644 arch/arm64/boot/dts/amlogic/meson-a1-ad402.dts
> 

For the whole serie:

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>

Thanks !

Neil
Neil Armstrong Sept. 11, 2023, 9:50 a.m. UTC | #2 
On 23/08/2023 23:36, Dmitry Rokosov wrote:
> This patch series introduces device tree declarations for various
> peripheral IPs of the A1 SoC family, including clock controllers, EFUSE,
> USB, SPI Flash Controller, SDIO, and UART_AO:
>      - CLK: A1 SoC has four types on the board, namely PLL, Peripherals,
>        CPU, and Audio, but only Amlogic A1 PLL and Peripherals clock
>        controllers are currently supported.
>      - EFUSE: consists of a 4k bit One Time Programmable (OTP) memory
>        divided into 32 128-bit blocks, and data is accessed using the APB
>        bus through software or the Key-ladder integrated with the EFUSE
>        block.
>      - USB: only one USB 2.0 high-speed port is available in the A1 SoC,
>        supporting both HOST and DEVICE modes for OTG.
>      - SPI Flash Controller: 4-bit QPI/SPI NOR Flash or NAND FLASH
>        controller.
>      - SDIO: for WiFi/IEEE802.11 connection.
>      - UART_AO: for Bluetooth connection.
>      - HWRNG: hardware random generator integrated into SoC.
>      - AO SECURE: board info registers.
> 
> The above peripherals are integrated to new AD402 board device tree.
> 
> Changes v2 since v1 at [1]:
>      - reorder meson-a1 dtsi includes to keep them sorted
>      - remove extra empty lines
>      - purge the unnecessary 'okay' status
>      - reorder all device tree nodes (existing and new) sorted by 'reg'
>        values
>      - introduce new saradc definition
>      - add hwrng dts node
>      - provide ao secure dts node with board info registers
>      - include all changes to new AD402 board device tree
>      - add AD402 board to bindings
> 
> Links:
>      [1] https://lore.kernel.org/all/20230607201641.20982-1-ddrokosov@sberdevices.ru/
> 
> Alexey Romanov (3):
>    arm64: dts: meson: a1: enable efuse controller and setup its clk
>    arm64: dts: meson: a1: add hw rng node
>    arm64: dts: meson: a1: add ao secure node
> 
> Dmitry Rokosov (8):
>    arm64: dts: meson: a1: reorder includes to keep them sorted
>    arm64: dts: meson: a1: remove extra empty line before reset node
>    arm64: dts: meson: a1: remove the unnecessary 'okay' status pwrc value
>    arm64: dts: meson: a1: reorder gpio_intc node definition
>    arm64: dts: meson: a1: introduce PLL and Peripherals clk controllers
>    arm64: dts: meson: a1: support USB controller in OTG mode
>    arm64: dts: introduce Amlogic AD402 reference board based on A113L SoC
>    dt-bindings: arm: amlogic: add Amlogic AD402 bindings
> 
> George Stark (1):
>    arm64: dts: meson: a1: add saradc definition
> 
> Jan Dakinevich (1):
>    arm64: dts: meson: a1: add eMMC controller and its pins
> 
> Martin Kurbanov (1):
>    arm64: dts: meson: a1: introduce SPI Flash Controller
> 
> Oleg Lyovin (1):
>    arm64: dts: meson: a1: introduce UART_AO mux definitions
> 
>   .../devicetree/bindings/arm/amlogic.yaml      |   1 +
>   arch/arm64/boot/dts/amlogic/Makefile          |   1 +
>   .../arm64/boot/dts/amlogic/meson-a1-ad402.dts | 145 ++++++++++++
>   arch/arm64/boot/dts/amlogic/meson-a1.dtsi     | 213 +++++++++++++++++-
>   4 files changed, 348 insertions(+), 12 deletions(-)
>   create mode 100644 arch/arm64/boot/dts/amlogic/meson-a1-ad402.dts
> 

B4 missed it but I applied this patchset into v6.7/arm64-dt.

Thanks,
Neil