Message ID | 20230901130440.2085-2-ville.syrjala@linux.intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | drm/i915: VRR, LRR, and M/N stuff | expand |
Looks good to me, Reviewed-by: Manasi Navare <navaremanasi@chromium.org> Manasi On Fri, Sep 1, 2023 at 6:04 AM Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Do the PSR unlock after the vblank evade critcal section is > fully over, not before. > > Cc: Manasi Navare <navaremanasi@chromium.org> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/display/intel_crtc.c | 9 +++++---- > 1 file changed, 5 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c > index 182c6dd64f47..5caa928e5ce9 100644 > --- a/drivers/gpu/drm/i915/display/intel_crtc.c > +++ b/drivers/gpu/drm/i915/display/intel_crtc.c > @@ -646,10 +646,8 @@ void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state) > ktime_t end_vbl_time = ktime_get(); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > > - intel_psr_unlock(new_crtc_state); > - > if (new_crtc_state->do_async_flip) > - return; > + goto out; > > trace_intel_pipe_update_end(crtc, end_vbl_count, scanline_end); > > @@ -709,7 +707,7 @@ void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state) > local_irq_enable(); > > if (intel_vgpu_active(dev_priv)) > - return; > + goto out; > > if (crtc->debug.start_vbl_count && > crtc->debug.start_vbl_count != end_vbl_count) { > @@ -724,4 +722,7 @@ void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state) > } > > dbg_vblank_evade(crtc, end_vbl_time); > + > +out: > + intel_psr_unlock(new_crtc_state); > } > -- > 2.41.0 >
> -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville > Syrjala > Sent: 01 September 2023 18:34 > To: intel-gfx@lists.freedesktop.org > Subject: [Intel-gfx] [PATCH 01/12] drm/i915: Move psr unlock out from the > pipe update critical section > > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Do the PSR unlock after the vblank evade critcal section is fully over, not > before. Typo *critical Other changes looks good to me. Reviewed-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> > > Cc: Manasi Navare <navaremanasi@chromium.org> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/display/intel_crtc.c | 9 +++++---- > 1 file changed, 5 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c > b/drivers/gpu/drm/i915/display/intel_crtc.c > index 182c6dd64f47..5caa928e5ce9 100644 > --- a/drivers/gpu/drm/i915/display/intel_crtc.c > +++ b/drivers/gpu/drm/i915/display/intel_crtc.c > @@ -646,10 +646,8 @@ void intel_pipe_update_end(struct intel_crtc_state > *new_crtc_state) > ktime_t end_vbl_time = ktime_get(); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > > - intel_psr_unlock(new_crtc_state); > - > if (new_crtc_state->do_async_flip) > - return; > + goto out; > > trace_intel_pipe_update_end(crtc, end_vbl_count, scanline_end); > > @@ -709,7 +707,7 @@ void intel_pipe_update_end(struct intel_crtc_state > *new_crtc_state) > local_irq_enable(); > > if (intel_vgpu_active(dev_priv)) > - return; > + goto out; > > if (crtc->debug.start_vbl_count && > crtc->debug.start_vbl_count != end_vbl_count) { @@ -724,4 +722,7 > @@ void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state) > } > > dbg_vblank_evade(crtc, end_vbl_time); > + > +out: > + intel_psr_unlock(new_crtc_state); > } > -- > 2.41.0
diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c index 182c6dd64f47..5caa928e5ce9 100644 --- a/drivers/gpu/drm/i915/display/intel_crtc.c +++ b/drivers/gpu/drm/i915/display/intel_crtc.c @@ -646,10 +646,8 @@ void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state) ktime_t end_vbl_time = ktime_get(); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); - intel_psr_unlock(new_crtc_state); - if (new_crtc_state->do_async_flip) - return; + goto out; trace_intel_pipe_update_end(crtc, end_vbl_count, scanline_end); @@ -709,7 +707,7 @@ void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state) local_irq_enable(); if (intel_vgpu_active(dev_priv)) - return; + goto out; if (crtc->debug.start_vbl_count && crtc->debug.start_vbl_count != end_vbl_count) { @@ -724,4 +722,7 @@ void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state) } dbg_vblank_evade(crtc, end_vbl_time); + +out: + intel_psr_unlock(new_crtc_state); }