| Message ID | 20230909165739.1036263-2-robimarko@gmail.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [v3,1/3] cpufreq: qcom-nvmem: add support for IPQ8074 | expand |
On Sat, Sep 09, 2023 at 06:56:01PM +0200, Robert Marko wrote: > From: Christian Marangi <ansuelsmth@gmail.com> > > Document named opp-microvolt property for opp-v2-kryo-cpu schema. > This property is used to declare multiple voltage ranges selected on the > different values read from efuses. The selection is done based on the > speed pvs values and the named opp-microvolt property is selected by the > qcom-cpufreq-nvmem driver. > > Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> > Signed-off-by: Robert Marko <robimarko@gmail.com> > --- > .../bindings/opp/opp-v2-kryo-cpu.yaml | 40 +++++++++++++++++++ > 1 file changed, 40 insertions(+) > > diff --git a/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml b/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml > index bbbad31ae4ca..6f216306a7eb 100644 > --- a/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml > +++ b/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml > @@ -63,6 +63,12 @@ patternProperties: > 5: MSM8996SG, speedbin 1 > 6: MSM8996SG, speedbin 2 > 7-31: unused > + > + Bitmap for IPQ806X SoC: > + 0: IPQ8062 > + 1: IPQ8064/IPQ8066/IPQ8068 > + 2: IPQ8065/IPQ8069 > + 3-31: unused > enum: [0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7, > 0x9, 0xd, 0xe, 0xf, > 0x10, 0x20, 0x30, 0x70] > @@ -71,6 +77,24 @@ patternProperties: > > required-opps: true > > + patternProperties: > + '^opp-microvolt-speed[0-9]+-pvs[0-9]+$': > + description: | > + Named opp-microvolt property following the same generic > + binding for named opp-microvolt. > + > + The correct voltage range is selected based on the values > + in the efuse for the speed and the pvs. What is "pvs"? > + > + The qcom-cpufreq-nvmem driver will read all these values > + and assign the correct named property. Specific driver details don't belong in binding. If there's some detail or requirement of all consumers, then that is fine here. > + $ref: /schemas/types.yaml#/definitions/uint32-matrix The common binding already defines the type. Drop. > + minItems: 1 > + maxItems: 8 # Should be enough regulators Does this really vary from 1 to 8 entries? Looks like copy-n-paste. > + items: > + minItems: 1 > + maxItems: 3 Do you really need to support both single voltage and <nom min max> forms? Rob
On Tue, Sep 12, 2023 at 10:42:39AM -0500, Rob Herring wrote: > On Sat, Sep 09, 2023 at 06:56:01PM +0200, Robert Marko wrote: > > From: Christian Marangi <ansuelsmth@gmail.com> > > > > Document named opp-microvolt property for opp-v2-kryo-cpu schema. > > This property is used to declare multiple voltage ranges selected on the > > different values read from efuses. The selection is done based on the > > speed pvs values and the named opp-microvolt property is selected by the > > qcom-cpufreq-nvmem driver. > > > > Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> > > Signed-off-by: Robert Marko <robimarko@gmail.com> > > --- > > .../bindings/opp/opp-v2-kryo-cpu.yaml | 40 +++++++++++++++++++ > > 1 file changed, 40 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml b/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml > > index bbbad31ae4ca..6f216306a7eb 100644 > > --- a/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml > > +++ b/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml > > @@ -63,6 +63,12 @@ patternProperties: > > 5: MSM8996SG, speedbin 1 > > 6: MSM8996SG, speedbin 2 > > 7-31: unused > > + > > + Bitmap for IPQ806X SoC: > > + 0: IPQ8062 > > + 1: IPQ8064/IPQ8066/IPQ8068 > > + 2: IPQ8065/IPQ8069 > > + 3-31: unused > > enum: [0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7, > > 0x9, 0xd, 0xe, 0xf, > > 0x10, 0x20, 0x30, 0x70] > > @@ -71,6 +77,24 @@ patternProperties: > > > > required-opps: true > > > > + patternProperties: > > + '^opp-microvolt-speed[0-9]+-pvs[0-9]+$': > > + description: | > > + Named opp-microvolt property following the same generic > > + binding for named opp-microvolt. > > + > > + The correct voltage range is selected based on the values > > + in the efuse for the speed and the pvs. > > What is "pvs"? > I will add the meaning in (). > > + > > + The qcom-cpufreq-nvmem driver will read all these values > > + and assign the correct named property. > > Specific driver details don't belong in binding. If there's some detail > or requirement of all consumers, then that is fine here. > Ok will drop. > > + $ref: /schemas/types.yaml#/definitions/uint32-matrix > > The common binding already defines the type. Drop. > > > + minItems: 1 > > + maxItems: 8 # Should be enough regulators > > Does this really vary from 1 to 8 entries? Looks like copy-n-paste. > Yes this comes from the default opp schema, actually the thing can support 4 regulators so I will change to that. > > + items: > > + minItems: 1 > > + maxItems: 3 > > Do you really need to support both single voltage and <nom min max> > forms? > It's all part of the OPP declaration so it would be supported anyway. Ok for me to enforce <nom min max>. But is it really necessary?
diff --git a/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml b/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml index bbbad31ae4ca..6f216306a7eb 100644 --- a/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml +++ b/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml @@ -63,6 +63,12 @@ patternProperties: 5: MSM8996SG, speedbin 1 6: MSM8996SG, speedbin 2 7-31: unused + + Bitmap for IPQ806X SoC: + 0: IPQ8062 + 1: IPQ8064/IPQ8066/IPQ8068 + 2: IPQ8065/IPQ8069 + 3-31: unused enum: [0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7, 0x9, 0xd, 0xe, 0xf, 0x10, 0x20, 0x30, 0x70] @@ -71,6 +77,24 @@ patternProperties: required-opps: true + patternProperties: + '^opp-microvolt-speed[0-9]+-pvs[0-9]+$': + description: | + Named opp-microvolt property following the same generic + binding for named opp-microvolt. + + The correct voltage range is selected based on the values + in the efuse for the speed and the pvs. + + The qcom-cpufreq-nvmem driver will read all these values + and assign the correct named property. + $ref: /schemas/types.yaml#/definitions/uint32-matrix + minItems: 1 + maxItems: 8 # Should be enough regulators + items: + minItems: 1 + maxItems: 3 + required: - opp-hz @@ -256,6 +280,22 @@ examples: }; }; + /* Dummy opp table to give example for named opp-microvolt */ + opp-table-2 { + compatible = "operating-points-v2-kryo-cpu"; + nvmem-cells = <&speedbin_efuse>; + + opp-384000000 { + opp-hz = /bits/ 64 <384000000>; + opp-microvolt-speed0-pvs0 = <1000000 950000 1050000>; + opp-microvolt-speed0-pvs1 = <925000 878750 971250>; + opp-microvolt-speed0-pvs2 = <875000 831250 918750>; + opp-microvolt-speed0-pvs3 = <800000 760000 840000>; + opp-supported-hw = <0x7>; + clock-latency-ns = <100000>; + }; + }; + smem { compatible = "qcom,smem"; memory-region = <&smem_mem>;