| Message ID | 20230913060606.1105349-2-mitulkumar.ajitkumar.golani@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add DSC fractional bpp support | expand |
> Subject: [PATCH 1/8] drm/display/dp: Add helper function to get DSC bpp > prescision > > From: Ankit Nautiyal <ankit.k.nautiyal@intel.com> > > Add helper to get the DSC bits_per_pixel precision for the DP sink. > I think you forgot to add my reviewed by that I gave in the last revision
On Wed, 13 Sep 2023, Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> wrote: > From: Ankit Nautiyal <ankit.k.nautiyal@intel.com> > > Add helper to get the DSC bits_per_pixel precision for the DP sink. > > Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Maarten, Maxime, Thomas, ack for merging this via drm-intel please? BR, Jani. > --- > drivers/gpu/drm/display/drm_dp_helper.c | 27 +++++++++++++++++++++++++ > include/drm/display/drm_dp_helper.h | 1 + > 2 files changed, 28 insertions(+) > > diff --git a/drivers/gpu/drm/display/drm_dp_helper.c b/drivers/gpu/drm/display/drm_dp_helper.c > index 8a1b64c57dfd..5c23d5b8fc50 100644 > --- a/drivers/gpu/drm/display/drm_dp_helper.c > +++ b/drivers/gpu/drm/display/drm_dp_helper.c > @@ -2323,6 +2323,33 @@ int drm_dp_read_desc(struct drm_dp_aux *aux, struct drm_dp_desc *desc, > } > EXPORT_SYMBOL(drm_dp_read_desc); > > +/** > + * drm_dp_dsc_sink_bpp_incr() - Get bits per pixel increment > + * @dsc_dpcd: DSC capabilities from DPCD > + * > + * Returns the bpp precision supported by the DP sink. > + */ > +u8 drm_dp_dsc_sink_bpp_incr(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]) > +{ > + u8 bpp_increment_dpcd = dsc_dpcd[DP_DSC_BITS_PER_PIXEL_INC - DP_DSC_SUPPORT]; > + > + switch (bpp_increment_dpcd) { > + case DP_DSC_BITS_PER_PIXEL_1_16: > + return 16; > + case DP_DSC_BITS_PER_PIXEL_1_8: > + return 8; > + case DP_DSC_BITS_PER_PIXEL_1_4: > + return 4; > + case DP_DSC_BITS_PER_PIXEL_1_2: > + return 2; > + case DP_DSC_BITS_PER_PIXEL_1_1: > + return 1; > + } > + > + return 0; > +} > +EXPORT_SYMBOL(drm_dp_dsc_sink_bpp_incr); > + > /** > * drm_dp_dsc_sink_max_slice_count() - Get the max slice count > * supported by the DSC sink. > diff --git a/include/drm/display/drm_dp_helper.h b/include/drm/display/drm_dp_helper.h > index 3369104e2d25..6968d4d87931 100644 > --- a/include/drm/display/drm_dp_helper.h > +++ b/include/drm/display/drm_dp_helper.h > @@ -164,6 +164,7 @@ drm_dp_is_branch(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) > } > > /* DP/eDP DSC support */ > +u8 drm_dp_dsc_sink_bpp_incr(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]); > u8 drm_dp_dsc_sink_max_slice_count(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], > bool is_edp); > u8 drm_dp_dsc_sink_line_buf_depth(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]);
On Thu, Sep 21, 2023 at 10:41:43AM +0300, Jani Nikula wrote: > On Wed, 13 Sep 2023, Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> wrote: > > From: Ankit Nautiyal <ankit.k.nautiyal@intel.com> > > > > Add helper to get the DSC bits_per_pixel precision for the DP sink. > > > > Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> > > Maarten, Maxime, Thomas, ack for merging this via drm-intel please? That's fine by me :) Maxime
Hi, The word 'prescision' in the commit title is a typo, perhaps it's more better correct it as 'precision' when merge. On 2023/9/13 14:05, Mitul Golani wrote: > From: Ankit Nautiyal <ankit.k.nautiyal@intel.com> > > Add helper to get the DSC bits_per_pixel precision for the DP sink. > > Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> > Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> > --- > drivers/gpu/drm/display/drm_dp_helper.c | 27 +++++++++++++++++++++++++ > include/drm/display/drm_dp_helper.h | 1 + > 2 files changed, 28 insertions(+) > > diff --git a/drivers/gpu/drm/display/drm_dp_helper.c b/drivers/gpu/drm/display/drm_dp_helper.c > index 8a1b64c57dfd..5c23d5b8fc50 100644 > --- a/drivers/gpu/drm/display/drm_dp_helper.c > +++ b/drivers/gpu/drm/display/drm_dp_helper.c > @@ -2323,6 +2323,33 @@ int drm_dp_read_desc(struct drm_dp_aux *aux, struct drm_dp_desc *desc, > } > EXPORT_SYMBOL(drm_dp_read_desc); > > +/** > + * drm_dp_dsc_sink_bpp_incr() - Get bits per pixel increment > + * @dsc_dpcd: DSC capabilities from DPCD > + * > + * Returns the bpp precision supported by the DP sink. > + */ > +u8 drm_dp_dsc_sink_bpp_incr(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]) > +{ > + u8 bpp_increment_dpcd = dsc_dpcd[DP_DSC_BITS_PER_PIXEL_INC - DP_DSC_SUPPORT]; > + > + switch (bpp_increment_dpcd) { > + case DP_DSC_BITS_PER_PIXEL_1_16: > + return 16; > + case DP_DSC_BITS_PER_PIXEL_1_8: > + return 8; > + case DP_DSC_BITS_PER_PIXEL_1_4: > + return 4; > + case DP_DSC_BITS_PER_PIXEL_1_2: > + return 2; > + case DP_DSC_BITS_PER_PIXEL_1_1: > + return 1; > + } > + > + return 0; > +} > +EXPORT_SYMBOL(drm_dp_dsc_sink_bpp_incr); > + > /** > * drm_dp_dsc_sink_max_slice_count() - Get the max slice count > * supported by the DSC sink. > diff --git a/include/drm/display/drm_dp_helper.h b/include/drm/display/drm_dp_helper.h > index 3369104e2d25..6968d4d87931 100644 > --- a/include/drm/display/drm_dp_helper.h > +++ b/include/drm/display/drm_dp_helper.h > @@ -164,6 +164,7 @@ drm_dp_is_branch(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) > } > > /* DP/eDP DSC support */ > +u8 drm_dp_dsc_sink_bpp_incr(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]); > u8 drm_dp_dsc_sink_max_slice_count(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], > bool is_edp); > u8 drm_dp_dsc_sink_line_buf_depth(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]);
diff --git a/drivers/gpu/drm/display/drm_dp_helper.c b/drivers/gpu/drm/display/drm_dp_helper.c index 8a1b64c57dfd..5c23d5b8fc50 100644 --- a/drivers/gpu/drm/display/drm_dp_helper.c +++ b/drivers/gpu/drm/display/drm_dp_helper.c @@ -2323,6 +2323,33 @@ int drm_dp_read_desc(struct drm_dp_aux *aux, struct drm_dp_desc *desc, } EXPORT_SYMBOL(drm_dp_read_desc); +/** + * drm_dp_dsc_sink_bpp_incr() - Get bits per pixel increment + * @dsc_dpcd: DSC capabilities from DPCD + * + * Returns the bpp precision supported by the DP sink. + */ +u8 drm_dp_dsc_sink_bpp_incr(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]) +{ + u8 bpp_increment_dpcd = dsc_dpcd[DP_DSC_BITS_PER_PIXEL_INC - DP_DSC_SUPPORT]; + + switch (bpp_increment_dpcd) { + case DP_DSC_BITS_PER_PIXEL_1_16: + return 16; + case DP_DSC_BITS_PER_PIXEL_1_8: + return 8; + case DP_DSC_BITS_PER_PIXEL_1_4: + return 4; + case DP_DSC_BITS_PER_PIXEL_1_2: + return 2; + case DP_DSC_BITS_PER_PIXEL_1_1: + return 1; + } + + return 0; +} +EXPORT_SYMBOL(drm_dp_dsc_sink_bpp_incr); + /** * drm_dp_dsc_sink_max_slice_count() - Get the max slice count * supported by the DSC sink. diff --git a/include/drm/display/drm_dp_helper.h b/include/drm/display/drm_dp_helper.h index 3369104e2d25..6968d4d87931 100644 --- a/include/drm/display/drm_dp_helper.h +++ b/include/drm/display/drm_dp_helper.h @@ -164,6 +164,7 @@ drm_dp_is_branch(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) } /* DP/eDP DSC support */ +u8 drm_dp_dsc_sink_bpp_incr(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]); u8 drm_dp_dsc_sink_max_slice_count(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], bool is_edp); u8 drm_dp_dsc_sink_line_buf_depth(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]);