Message ID | 20230915104849.187146-3-manikandan.m@microchip.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Add support for XLCDC to sam9x7 SoC family. | expand |
On 15.09.2023 13:48, Manikandan Muralidharan wrote: > Add is_xlcdc flag and LCD IP specific ops in driver data to differentiate > XLCDC and HLCDC code within the atmel-hlcdc driver files. > > Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com> > --- > drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h | 68 ++++++++++++++++++++ > 1 file changed, 68 insertions(+) > > diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h > index 5b5c774e0edf..c61fa1733da4 100644 > --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h > +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h > @@ -177,6 +177,9 @@ struct atmel_hlcdc_layer_cfg_layout { > int csc; > }; > > +struct atmel_hlcdc_plane_state; > +struct atmel_lcdc_dc_ops; > + > /** > * Atmel HLCDC DMA descriptor structure > * > @@ -304,8 +307,10 @@ atmel_hlcdc_layer_to_plane(struct atmel_hlcdc_layer *layer) > * @conflicting_output_formats: true if RGBXXX output formats conflict with > * each other. > * @fixed_clksrc: true if clock source is fixed > + * @is_xlcdc: true if XLCDC IP is supported > * @layers: a layer description table describing available layers > * @nlayers: layer description table size > + * @ops: atmel lcdc dc ops > */ > struct atmel_hlcdc_dc_desc { > int min_width; > @@ -317,8 +322,10 @@ struct atmel_hlcdc_dc_desc { > int max_hpw; > bool conflicting_output_formats; > bool fixed_clksrc; > + bool is_xlcdc; > const struct atmel_hlcdc_layer_desc *layers; > int nlayers; > + const struct atmel_lcdc_dc_ops *ops; > }; > > /** > @@ -345,6 +352,67 @@ struct atmel_hlcdc_dc { > } suspend; > }; > > +/** > + * struct atmel_lcdc_dc_ops - describes atmel_lcdc ops group > + * to differentiate HLCDC and XLCDC IP code support. > + * @plane_setup_scaler: update the vertical and horizontal scaling factors > + * @update_lcdc_buffers: update the each LCDC layers DMA registers. "the" article seems extra here > + * @lcdc_atomic_disable: disable LCDC interrupts and layers > + * @lcdc_update_general_settings: update each LCDC layers general > + * confiugration register. s/confiugration/configuration > + * @lcdc_atomic_update: enable the LCDC layers and interrupts. s/enable/update in description? > + * @lcdc_csc_init: update the color space conversion co-efficient of > + * High-end overlay register. > + * @lcdc_irq_dbg: to raise alert incase of interrupt overrun in any LCDC layer. s/incase/in case You have . after some description and nothing after others. Choose a patern. The one w/o dot is the commmon accross kernel doc AFAICT > + */ > +struct atmel_lcdc_dc_ops { > + void (*plane_setup_scaler)(struct atmel_hlcdc_plane *plane, > + struct atmel_hlcdc_plane_state *state); > + void (*update_lcdc_buffers)(struct atmel_hlcdc_plane *plane, > + struct atmel_hlcdc_plane_state *state, > + u32 sr, int i); > + void (*lcdc_atomic_disable)(struct atmel_hlcdc_plane *plane); > + void (*lcdc_update_general_settings)(struct atmel_hlcdc_plane *plane, > + struct atmel_hlcdc_plane_state *state); > + void (*lcdc_atomic_update)(struct atmel_hlcdc_plane *plane, > + struct atmel_hlcdc_dc *dc); > + void (*lcdc_csc_init)(struct atmel_hlcdc_plane *plane, > + const struct atmel_hlcdc_layer_desc *desc); > + void (*lcdc_irq_dbg)(struct atmel_hlcdc_plane *plane, > + const struct atmel_hlcdc_layer_desc *desc); > +}; > + > +void atmel_hlcdc_plane_setup_scaler(struct atmel_hlcdc_plane *plane, > + struct atmel_hlcdc_plane_state *state); > +void atmel_xlcdc_plane_setup_scaler(struct atmel_hlcdc_plane *plane, > + struct atmel_hlcdc_plane_state *state); > +void update_hlcdc_buffers(struct atmel_hlcdc_plane *plane, > + struct atmel_hlcdc_plane_state *state, > + u32 sr, int i); > +void update_xlcdc_buffers(struct atmel_hlcdc_plane *plane, > + struct atmel_hlcdc_plane_state *state, > + u32 sr, int i); > +void hlcdc_atomic_disable(struct atmel_hlcdc_plane *plane); > +void xlcdc_atomic_disable(struct atmel_hlcdc_plane *plane); > +void > +atmel_hlcdc_plane_update_general_settings(struct atmel_hlcdc_plane *plane, > + struct atmel_hlcdc_plane_state *state); > +void > +atmel_xlcdc_plane_update_general_settings(struct atmel_hlcdc_plane *plane, > + struct atmel_hlcdc_plane_state *state); > +void hlcdc_atomic_update(struct atmel_hlcdc_plane *plane, > + struct atmel_hlcdc_dc *dc); > +void xlcdc_atomic_update(struct atmel_hlcdc_plane *plane, > + struct atmel_hlcdc_dc *dc); > +void hlcdc_csc_init(struct atmel_hlcdc_plane *plane, > + const struct atmel_hlcdc_layer_desc *desc); > +void xlcdc_csc_init(struct atmel_hlcdc_plane *plane, > + const struct atmel_hlcdc_layer_desc *desc); > +void hlcdc_irq_dbg(struct atmel_hlcdc_plane *plane, > + const struct atmel_hlcdc_layer_desc *desc); > +void xlcdc_irq_dbg(struct atmel_hlcdc_plane *plane, > + const struct atmel_hlcdc_layer_desc *desc); > + You can get rid of these and keep the function definitions static to atmel_hlcdc_plane.c if you define struct atmel_lcdc_dc_ops objects directly to atmel_hlcdc_plane.c. In atmel_hlcdc_dc.c you can have something like: extern const struct atmel_lcdc_dc_ops atmel_hlcdc_ops; extern const struct atmel_lcdc_dc_ops atmel_xlcdc_ops; > extern struct atmel_hlcdc_formats atmel_hlcdc_plane_rgb_formats; > extern struct atmel_hlcdc_formats atmel_hlcdc_plane_rgb_and_yuv_formats; >
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h index 5b5c774e0edf..c61fa1733da4 100644 --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h @@ -177,6 +177,9 @@ struct atmel_hlcdc_layer_cfg_layout { int csc; }; +struct atmel_hlcdc_plane_state; +struct atmel_lcdc_dc_ops; + /** * Atmel HLCDC DMA descriptor structure * @@ -304,8 +307,10 @@ atmel_hlcdc_layer_to_plane(struct atmel_hlcdc_layer *layer) * @conflicting_output_formats: true if RGBXXX output formats conflict with * each other. * @fixed_clksrc: true if clock source is fixed + * @is_xlcdc: true if XLCDC IP is supported * @layers: a layer description table describing available layers * @nlayers: layer description table size + * @ops: atmel lcdc dc ops */ struct atmel_hlcdc_dc_desc { int min_width; @@ -317,8 +322,10 @@ struct atmel_hlcdc_dc_desc { int max_hpw; bool conflicting_output_formats; bool fixed_clksrc; + bool is_xlcdc; const struct atmel_hlcdc_layer_desc *layers; int nlayers; + const struct atmel_lcdc_dc_ops *ops; }; /** @@ -345,6 +352,67 @@ struct atmel_hlcdc_dc { } suspend; }; +/** + * struct atmel_lcdc_dc_ops - describes atmel_lcdc ops group + * to differentiate HLCDC and XLCDC IP code support. + * @plane_setup_scaler: update the vertical and horizontal scaling factors + * @update_lcdc_buffers: update the each LCDC layers DMA registers. + * @lcdc_atomic_disable: disable LCDC interrupts and layers + * @lcdc_update_general_settings: update each LCDC layers general + * confiugration register. + * @lcdc_atomic_update: enable the LCDC layers and interrupts. + * @lcdc_csc_init: update the color space conversion co-efficient of + * High-end overlay register. + * @lcdc_irq_dbg: to raise alert incase of interrupt overrun in any LCDC layer. + */ +struct atmel_lcdc_dc_ops { + void (*plane_setup_scaler)(struct atmel_hlcdc_plane *plane, + struct atmel_hlcdc_plane_state *state); + void (*update_lcdc_buffers)(struct atmel_hlcdc_plane *plane, + struct atmel_hlcdc_plane_state *state, + u32 sr, int i); + void (*lcdc_atomic_disable)(struct atmel_hlcdc_plane *plane); + void (*lcdc_update_general_settings)(struct atmel_hlcdc_plane *plane, + struct atmel_hlcdc_plane_state *state); + void (*lcdc_atomic_update)(struct atmel_hlcdc_plane *plane, + struct atmel_hlcdc_dc *dc); + void (*lcdc_csc_init)(struct atmel_hlcdc_plane *plane, + const struct atmel_hlcdc_layer_desc *desc); + void (*lcdc_irq_dbg)(struct atmel_hlcdc_plane *plane, + const struct atmel_hlcdc_layer_desc *desc); +}; + +void atmel_hlcdc_plane_setup_scaler(struct atmel_hlcdc_plane *plane, + struct atmel_hlcdc_plane_state *state); +void atmel_xlcdc_plane_setup_scaler(struct atmel_hlcdc_plane *plane, + struct atmel_hlcdc_plane_state *state); +void update_hlcdc_buffers(struct atmel_hlcdc_plane *plane, + struct atmel_hlcdc_plane_state *state, + u32 sr, int i); +void update_xlcdc_buffers(struct atmel_hlcdc_plane *plane, + struct atmel_hlcdc_plane_state *state, + u32 sr, int i); +void hlcdc_atomic_disable(struct atmel_hlcdc_plane *plane); +void xlcdc_atomic_disable(struct atmel_hlcdc_plane *plane); +void +atmel_hlcdc_plane_update_general_settings(struct atmel_hlcdc_plane *plane, + struct atmel_hlcdc_plane_state *state); +void +atmel_xlcdc_plane_update_general_settings(struct atmel_hlcdc_plane *plane, + struct atmel_hlcdc_plane_state *state); +void hlcdc_atomic_update(struct atmel_hlcdc_plane *plane, + struct atmel_hlcdc_dc *dc); +void xlcdc_atomic_update(struct atmel_hlcdc_plane *plane, + struct atmel_hlcdc_dc *dc); +void hlcdc_csc_init(struct atmel_hlcdc_plane *plane, + const struct atmel_hlcdc_layer_desc *desc); +void xlcdc_csc_init(struct atmel_hlcdc_plane *plane, + const struct atmel_hlcdc_layer_desc *desc); +void hlcdc_irq_dbg(struct atmel_hlcdc_plane *plane, + const struct atmel_hlcdc_layer_desc *desc); +void xlcdc_irq_dbg(struct atmel_hlcdc_plane *plane, + const struct atmel_hlcdc_layer_desc *desc); + extern struct atmel_hlcdc_formats atmel_hlcdc_plane_rgb_formats; extern struct atmel_hlcdc_formats atmel_hlcdc_plane_rgb_and_yuv_formats;
Add is_xlcdc flag and LCD IP specific ops in driver data to differentiate XLCDC and HLCDC code within the atmel-hlcdc driver files. Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com> --- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h | 68 ++++++++++++++++++++ 1 file changed, 68 insertions(+)