Message ID | 20230929-ad2s1210-mainline-v3-1-fa4364281745@baylibre.com (mailing list archive) |
---|---|
State | Changes Requested |
Headers | show |
Series | iio: resolver: move ad2s1210 out of staging | expand |
On Fri, 29 Sep 2023 12:23:06 -0500 David Lechner <dlechner@baylibre.com> wrote: > From: David Lechner <david@lechnology.com> > > From: David Lechner <dlechner@baylibre.com> > > This adds new DeviceTree bindings for the Analog Devices, Inc. AD2S1210 > resolver-to-digital converter. > > Co-developed-by: Apelete Seketeli <aseketeli@baylibre.com> > Signed-off-by: Apelete Seketeli <aseketeli@baylibre.com> > Signed-off-by: David Lechner <dlechner@baylibre.com> Michael, ideally I'd like your ack on this given it volunteers you as maintainer. If I don't hear I'm fine with leaving Michael listed because he's in MAINTAINERS anyway covering these bindings via a wild card entry: ANALOG DEVICES INC IIO DRIVERS M: Lars-Peter Clausen <lars@metafoo.de> M: Michael Hennerich <Michael.Hennerich@analog.com> ... F: Documentation/devicetree/bindings/iio/*/adi,* So any queries should hit Michael anyway. LGTM but I'll also want the dt binding maintainers input before picking this up. Jonathan > --- > > v3 changes: > * Expanded top-level description of A0/A1 lines. > * Added required voltage -supply properties. (I did not pick up Rob's > Reviewed-by since I wasn't sure if this was trivial enough.) > > v2 changes: > * Add Co-developed-by: > * Remove extraneous quotes on strings > * Remove extraneous pipe on some multi-line descriptions > > .../bindings/iio/resolver/adi,ad2s1210.yaml | 177 +++++++++++++++++++++ > 1 file changed, 177 insertions(+) > > diff --git a/Documentation/devicetree/bindings/iio/resolver/adi,ad2s1210.yaml b/Documentation/devicetree/bindings/iio/resolver/adi,ad2s1210.yaml > new file mode 100644 > index 000000000000..8980b3cd8337 > --- /dev/null > +++ b/Documentation/devicetree/bindings/iio/resolver/adi,ad2s1210.yaml > @@ -0,0 +1,177 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/iio/resolver/adi,ad2s1210.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Analog Devices AD2S1210 Resolver-to-Digital Converter > + > +maintainers: > + - Michael Hennerich <michael.hennerich@analog.com> > + > +description: | > + The AD2S1210 is a complete 10-bit to 16-bit resolution tracking > + resolver-to-digital converter, integrating an on-board programmable > + sinusoidal oscillator that provides sine wave excitation for > + resolvers. > + > + The AD2S1210 allows the user to read the angular position or the > + angular velocity data directly from the parallel outputs or through > + the serial interface. > + > + The mode of operation of the communication channel (parallel or serial) is > + selected by the A0 and A1 input pins. In normal mode, data is latched by > + toggling the SAMPLE line and can then be read directly. In configuration mode, > + data is read or written using a register access scheme (address byte with > + read/write flag and data byte). > + > + A1 A0 Result > + 0 0 Normal mode - position output > + 0 1 Normal mode - velocity output > + 1 0 Reserved > + 1 1 Configuration mode > + > + In normal mode, the resolution of the digital output is selected using > + the RES0 and RES1 input pins. In configuration mode, the resolution is > + selected by setting the RES0 and RES1 bits in the control register. > + > + RES1 RES0 Resolution (Bits) > + 0 0 10 > + 0 1 12 > + 1 0 14 > + 1 1 16 > + > + Note on SPI connections: The CS line on the AD2S1210 should hard-wired to > + logic low and the WR/FSYNC line on the AD2S1210 should be connected to the > + SPI CSn output of the SPI controller. > + > + Datasheet: > + https://www.analog.com/media/en/technical-documentation/data-sheets/ad2s1210.pdf > + > +properties: > + compatible: > + const: adi,ad2s1210 > + > + reg: > + maxItems: 1 > + > + spi-max-frequency: > + maximum: 25000000 > + > + spi-cpha: true > + > + avdd-supply: > + description: > + A 4.75 to 5.25 V regulator that powers the Analog Supply Voltage (AVDD) > + pin. > + > + dvdd-supply: > + description: > + A 4.75 to 5.25 V regulator that powers the Digital Supply Voltage (DVDD) > + pin. > + > + vdrive-supply: > + description: > + A 2.3 to 5.25 V regulator that powers the Logic Power Supply Input > + (VDrive) pin. > + > + clocks: > + maxItems: 1 > + description: External oscillator clock (CLKIN). > + > + reset-gpios: > + description: > + GPIO connected to the /RESET pin. As the line needs to be low for the > + reset to be active, it should be configured as GPIO_ACTIVE_LOW. > + maxItems: 1 > + > + sample-gpios: > + description: > + GPIO connected to the /SAMPLE pin. As the line needs to be low to trigger > + a sample, it should be configured as GPIO_ACTIVE_LOW. > + maxItems: 1 > + > + mode-gpios: > + description: > + GPIO lines connected to the A0 and A1 pins. These pins select the data > + transfer mode. > + minItems: 2 > + maxItems: 2 > + > + resolution-gpios: > + description: > + GPIO lines connected to the RES0 and RES1 pins. These pins select the > + resolution of the digital output. If omitted, it is assumed that the > + RES0 and RES1 pins are hard-wired to match the assigned-resolution-bits > + property. > + minItems: 2 > + maxItems: 2 > + > + fault-gpios: > + description: > + GPIO lines connected to the LOT and DOS pins. These pins combined indicate > + the type of fault present, if any. As these pins a pulled low to indicate > + a fault condition, they should be configured as GPIO_ACTIVE_LOW. > + minItems: 2 > + maxItems: 2 > + > + adi,fixed-mode: > + description: > + This is used to indicate the selected mode if A0 and A1 are hard-wired > + instead of connected to GPIOS (i.e. mode-gpios is omitted). > + $ref: /schemas/types.yaml#/definitions/string > + enum: [config, velocity, position] > + > + assigned-resolution-bits: > + description: > + Resolution of the digital output required by the application. This > + determines the precision of the angle and/or the maximum speed that can > + be measured. If resolution-gpios is omitted, it is assumed that RES0 and > + RES1 are hard-wired to match this value. > + enum: [10, 12, 14, 16] > + > +required: > + - compatible > + - reg > + - spi-cpha > + - avdd-supply > + - dvdd-supply > + - vdrive-supply > + - clocks > + - sample-gpios > + - assigned-resolution-bits > + > +oneOf: > + - required: > + - mode-gpios > + - required: > + - adi,fixed-mode > + > +allOf: > + - $ref: /schemas/spi/spi-peripheral-props.yaml# > + > +unevaluatedProperties: false > + > +examples: > + - | > + #include <dt-bindings/gpio/gpio.h> > + > + spi { > + #address-cells = <1>; > + #size-cells = <0>; > + > + resolver@0 { > + compatible = "adi,ad2s1210"; > + reg = <0>; > + spi-max-frequency = <20000000>; > + spi-cpha; > + avdd-supply = <&avdd_regulator>; > + dvdd-supply = <&dvdd_regulator>; > + vdrive-supply = <&vdrive_regulator>; > + clocks = <&ext_osc>; > + sample-gpios = <&gpio0 90 GPIO_ACTIVE_LOW>; > + mode-gpios = <&gpio0 86 0>, <&gpio0 87 0>; > + resolution-gpios = <&gpio0 88 0>, <&gpio0 89 0>; > + assigned-resolution-bits = <16>; > + }; > + }; >
On Fri, Sep 29, 2023 at 12:23:06PM -0500, David Lechner wrote: > From: David Lechner <david@lechnology.com> > > From: David Lechner <dlechner@baylibre.com> > Having two from headers kind of messes things up. The second From is included in the body of the commit message. regards, dan carpenter
On Mon, 2 Oct 2023 11:02:40 +0300 Dan Carpenter <dan.carpenter@linaro.org> wrote: > On Fri, Sep 29, 2023 at 12:23:06PM -0500, David Lechner wrote: > > From: David Lechner <david@lechnology.com> > > > > From: David Lechner <dlechner@baylibre.com> > > > > Having two from headers kind of messes things up. The second From is > included in the body of the commit message. > > regards, > dan carpenter Strangely b4 + git am didn't do that. I was assuming I'd need to fix these by hand but didn't need to. I thanked my lucky stars for a few mins saved and didn't look into why ;) e.g. https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio.git/commit/?h=testing&id=b3689e14415a874630f0894d8c3ac7ea01603d57 BTW, David replied to the cover letter to call out this mess up.
On Fri, 29 Sep 2023 12:23:06 -0500, David Lechner wrote: > From: David Lechner <david@lechnology.com> > > From: David Lechner <dlechner@baylibre.com> > > This adds new DeviceTree bindings for the Analog Devices, Inc. AD2S1210 > resolver-to-digital converter. > > Co-developed-by: Apelete Seketeli <aseketeli@baylibre.com> > Signed-off-by: Apelete Seketeli <aseketeli@baylibre.com> > Signed-off-by: David Lechner <dlechner@baylibre.com> > --- > > v3 changes: > * Expanded top-level description of A0/A1 lines. > * Added required voltage -supply properties. (I did not pick up Rob's > Reviewed-by since I wasn't sure if this was trivial enough.) > > v2 changes: > * Add Co-developed-by: > * Remove extraneous quotes on strings > * Remove extraneous pipe on some multi-line descriptions > > .../bindings/iio/resolver/adi,ad2s1210.yaml | 177 +++++++++++++++++++++ > 1 file changed, 177 insertions(+) > Reviewed-by: Rob Herring <robh@kernel.org>
> -----Original Message----- > From: Jonathan Cameron <jic23@kernel.org> > Sent: Samstag, 30. September 2023 16:34 > To: David Lechner <dlechner@baylibre.com> > Cc: linux-iio@vger.kernel.org; devicetree@vger.kernel.org; linux- > staging@lists.linux.dev; David Lechner <david@lechnology.com>; Rob Herring > <robh+dt@kernel.org>; Krzysztof Kozlowski > <krzysztof.kozlowski+dt@linaro.org>; Conor Dooley <conor+dt@kernel.org>; > Hennerich, Michael <Michael.Hennerich@analog.com>; Sa, Nuno > <Nuno.Sa@analog.com>; Axel Haslam <ahaslam@baylibre.com>; Philip Molloy > <pmolloy@baylibre.com>; linux-kernel@vger.kernel.org; Apelete Seketeli > <aseketeli@baylibre.com> > Subject: Re: [PATCH v3 01/27] dt-bindings: iio: resolver: add devicetree > bindings for ad2s1210 > > > On Fri, 29 Sep 2023 12:23:06 -0500 > David Lechner <dlechner@baylibre.com> wrote: > > > From: David Lechner <david@lechnology.com> > > > > From: David Lechner <dlechner@baylibre.com> > > > > This adds new DeviceTree bindings for the Analog Devices, Inc. > > AD2S1210 resolver-to-digital converter. > > > > Co-developed-by: Apelete Seketeli <aseketeli@baylibre.com> > > Signed-off-by: Apelete Seketeli <aseketeli@baylibre.com> > > Signed-off-by: David Lechner <dlechner@baylibre.com> > > Michael, ideally I'd like your ack on this given it volunteers you as maintainer. If > I don't hear I'm fine with leaving Michael listed because he's in MAINTAINERS > anyway covering these bindings via a wild card entry: Acked-by: Michael Hennerich <michael.hennerich@analog.com> > > ANALOG DEVICES INC IIO DRIVERS > M: Lars-Peter Clausen <lars@metafoo.de> > M: Michael Hennerich <Michael.Hennerich@analog.com> > ... > F: Documentation/devicetree/bindings/iio/*/adi,* > > So any queries should hit Michael anyway. > > LGTM but I'll also want the dt binding maintainers input before picking this up. > > Jonathan > > > --- > > > > v3 changes: > > * Expanded top-level description of A0/A1 lines. > > * Added required voltage -supply properties. (I did not pick up Rob's > > Reviewed-by since I wasn't sure if this was trivial enough.) > > > > v2 changes: > > * Add Co-developed-by: > > * Remove extraneous quotes on strings > > * Remove extraneous pipe on some multi-line descriptions > > > > .../bindings/iio/resolver/adi,ad2s1210.yaml | 177 > +++++++++++++++++++++ > > 1 file changed, 177 insertions(+) > > > > diff --git > > a/Documentation/devicetree/bindings/iio/resolver/adi,ad2s1210.yaml > > b/Documentation/devicetree/bindings/iio/resolver/adi,ad2s1210.yaml > > new file mode 100644 > > index 000000000000..8980b3cd8337 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/iio/resolver/adi,ad2s1210.yaml > > @@ -0,0 +1,177 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 > > +--- > > +$id: > > +https://urldefense.com/v3/__http://devicetree.org/schemas/iio/resolve > > > +r/adi,ad2s1210.yaml*__;Iw!!A3Ni8CS0y2Y!_mSGRdlDHlqAKev0r38paa3K51l2k > G > > +o8bShqK2TH4nAF_cYu2WixIa62xv0p-A70086DQmj4oN9FWvOlk78$ > > +$schema: > > +https://urldefense.com/v3/__http://devicetree.org/meta-schemas/core.y > > > +aml*__;Iw!!A3Ni8CS0y2Y!_mSGRdlDHlqAKev0r38paa3K51l2kGo8bShqK2TH4n > AF_c > > +Yu2WixIa62xv0p-A70086DQmj4oN9FWzdE10U$ > > + > > +title: Analog Devices AD2S1210 Resolver-to-Digital Converter > > + > > +maintainers: > > + - Michael Hennerich <michael.hennerich@analog.com> > > + > > +description: | > > + The AD2S1210 is a complete 10-bit to 16-bit resolution tracking > > + resolver-to-digital converter, integrating an on-board programmable > > + sinusoidal oscillator that provides sine wave excitation for > > + resolvers. > > + > > + The AD2S1210 allows the user to read the angular position or the > > + angular velocity data directly from the parallel outputs or through > > + the serial interface. > > + > > + The mode of operation of the communication channel (parallel or > > + serial) is selected by the A0 and A1 input pins. In normal mode, > > + data is latched by toggling the SAMPLE line and can then be read > > + directly. In configuration mode, data is read or written using a > > + register access scheme (address byte with read/write flag and data byte). > > + > > + A1 A0 Result > > + 0 0 Normal mode - position output > > + 0 1 Normal mode - velocity output > > + 1 0 Reserved > > + 1 1 Configuration mode > > + > > + In normal mode, the resolution of the digital output is selected > > + using the RES0 and RES1 input pins. In configuration mode, the > > + resolution is selected by setting the RES0 and RES1 bits in the control > register. > > + > > + RES1 RES0 Resolution (Bits) > > + 0 0 10 > > + 0 1 12 > > + 1 0 14 > > + 1 1 16 > > + > > + Note on SPI connections: The CS line on the AD2S1210 should > > + hard-wired to logic low and the WR/FSYNC line on the AD2S1210 > > + should be connected to the SPI CSn output of the SPI controller. > > + > > + Datasheet: > > + > > + https://www.analog.com/media/en/technical-documentation/data-sheets/ > > + ad2s1210.pdf > > + > > +properties: > > + compatible: > > + const: adi,ad2s1210 > > + > > + reg: > > + maxItems: 1 > > + > > + spi-max-frequency: > > + maximum: 25000000 > > + > > + spi-cpha: true > > + > > + avdd-supply: > > + description: > > + A 4.75 to 5.25 V regulator that powers the Analog Supply Voltage > (AVDD) > > + pin. > > + > > + dvdd-supply: > > + description: > > + A 4.75 to 5.25 V regulator that powers the Digital Supply Voltage (DVDD) > > + pin. > > + > > + vdrive-supply: > > + description: > > + A 2.3 to 5.25 V regulator that powers the Logic Power Supply Input > > + (VDrive) pin. > > + > > + clocks: > > + maxItems: 1 > > + description: External oscillator clock (CLKIN). > > + > > + reset-gpios: > > + description: > > + GPIO connected to the /RESET pin. As the line needs to be low for the > > + reset to be active, it should be configured as GPIO_ACTIVE_LOW. > > + maxItems: 1 > > + > > + sample-gpios: > > + description: > > + GPIO connected to the /SAMPLE pin. As the line needs to be low to > trigger > > + a sample, it should be configured as GPIO_ACTIVE_LOW. > > + maxItems: 1 > > + > > + mode-gpios: > > + description: > > + GPIO lines connected to the A0 and A1 pins. These pins select the data > > + transfer mode. > > + minItems: 2 > > + maxItems: 2 > > + > > + resolution-gpios: > > + description: > > + GPIO lines connected to the RES0 and RES1 pins. These pins select the > > + resolution of the digital output. If omitted, it is assumed that the > > + RES0 and RES1 pins are hard-wired to match the assigned-resolution-bits > > + property. > > + minItems: 2 > > + maxItems: 2 > > + > > + fault-gpios: > > + description: > > + GPIO lines connected to the LOT and DOS pins. These pins combined > indicate > > + the type of fault present, if any. As these pins a pulled low to indicate > > + a fault condition, they should be configured as GPIO_ACTIVE_LOW. > > + minItems: 2 > > + maxItems: 2 > > + > > + adi,fixed-mode: > > + description: > > + This is used to indicate the selected mode if A0 and A1 are hard-wired > > + instead of connected to GPIOS (i.e. mode-gpios is omitted). > > + $ref: /schemas/types.yaml#/definitions/string > > + enum: [config, velocity, position] > > + > > + assigned-resolution-bits: > > + description: > > + Resolution of the digital output required by the application. This > > + determines the precision of the angle and/or the maximum speed that > can > > + be measured. If resolution-gpios is omitted, it is assumed that RES0 and > > + RES1 are hard-wired to match this value. > > + enum: [10, 12, 14, 16] > > + > > +required: > > + - compatible > > + - reg > > + - spi-cpha > > + - avdd-supply > > + - dvdd-supply > > + - vdrive-supply > > + - clocks > > + - sample-gpios > > + - assigned-resolution-bits > > + > > +oneOf: > > + - required: > > + - mode-gpios > > + - required: > > + - adi,fixed-mode > > + > > +allOf: > > + - $ref: /schemas/spi/spi-peripheral-props.yaml# > > + > > +unevaluatedProperties: false > > + > > +examples: > > + - | > > + #include <dt-bindings/gpio/gpio.h> > > + > > + spi { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + resolver@0 { > > + compatible = "adi,ad2s1210"; > > + reg = <0>; > > + spi-max-frequency = <20000000>; > > + spi-cpha; > > + avdd-supply = <&avdd_regulator>; > > + dvdd-supply = <&dvdd_regulator>; > > + vdrive-supply = <&vdrive_regulator>; > > + clocks = <&ext_osc>; > > + sample-gpios = <&gpio0 90 GPIO_ACTIVE_LOW>; > > + mode-gpios = <&gpio0 86 0>, <&gpio0 87 0>; > > + resolution-gpios = <&gpio0 88 0>, <&gpio0 89 0>; > > + assigned-resolution-bits = <16>; > > + }; > > + }; > >
On Mon, 2 Oct 2023 10:18:56 -0500 Rob Herring <robh@kernel.org> wrote: > On Fri, 29 Sep 2023 12:23:06 -0500, David Lechner wrote: > > From: David Lechner <david@lechnology.com> > > > > From: David Lechner <dlechner@baylibre.com> > > > > This adds new DeviceTree bindings for the Analog Devices, Inc. AD2S1210 > > resolver-to-digital converter. > > > > Co-developed-by: Apelete Seketeli <aseketeli@baylibre.com> > > Signed-off-by: Apelete Seketeli <aseketeli@baylibre.com> > > Signed-off-by: David Lechner <dlechner@baylibre.com> > > --- > > > > v3 changes: > > * Expanded top-level description of A0/A1 lines. > > * Added required voltage -supply properties. (I did not pick up Rob's > > Reviewed-by since I wasn't sure if this was trivial enough.) > > > > v2 changes: > > * Add Co-developed-by: > > * Remove extraneous quotes on strings > > * Remove extraneous pipe on some multi-line descriptions > > > > .../bindings/iio/resolver/adi,ad2s1210.yaml | 177 +++++++++++++++++++++ > > 1 file changed, 177 insertions(+) > > > > Reviewed-by: Rob Herring <robh@kernel.org> > Applied to the togreg branch of iio.git and pushed out as testing for all the normal reasons. Jonathan
diff --git a/Documentation/devicetree/bindings/iio/resolver/adi,ad2s1210.yaml b/Documentation/devicetree/bindings/iio/resolver/adi,ad2s1210.yaml new file mode 100644 index 000000000000..8980b3cd8337 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/resolver/adi,ad2s1210.yaml @@ -0,0 +1,177 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/resolver/adi,ad2s1210.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices AD2S1210 Resolver-to-Digital Converter + +maintainers: + - Michael Hennerich <michael.hennerich@analog.com> + +description: | + The AD2S1210 is a complete 10-bit to 16-bit resolution tracking + resolver-to-digital converter, integrating an on-board programmable + sinusoidal oscillator that provides sine wave excitation for + resolvers. + + The AD2S1210 allows the user to read the angular position or the + angular velocity data directly from the parallel outputs or through + the serial interface. + + The mode of operation of the communication channel (parallel or serial) is + selected by the A0 and A1 input pins. In normal mode, data is latched by + toggling the SAMPLE line and can then be read directly. In configuration mode, + data is read or written using a register access scheme (address byte with + read/write flag and data byte). + + A1 A0 Result + 0 0 Normal mode - position output + 0 1 Normal mode - velocity output + 1 0 Reserved + 1 1 Configuration mode + + In normal mode, the resolution of the digital output is selected using + the RES0 and RES1 input pins. In configuration mode, the resolution is + selected by setting the RES0 and RES1 bits in the control register. + + RES1 RES0 Resolution (Bits) + 0 0 10 + 0 1 12 + 1 0 14 + 1 1 16 + + Note on SPI connections: The CS line on the AD2S1210 should hard-wired to + logic low and the WR/FSYNC line on the AD2S1210 should be connected to the + SPI CSn output of the SPI controller. + + Datasheet: + https://www.analog.com/media/en/technical-documentation/data-sheets/ad2s1210.pdf + +properties: + compatible: + const: adi,ad2s1210 + + reg: + maxItems: 1 + + spi-max-frequency: + maximum: 25000000 + + spi-cpha: true + + avdd-supply: + description: + A 4.75 to 5.25 V regulator that powers the Analog Supply Voltage (AVDD) + pin. + + dvdd-supply: + description: + A 4.75 to 5.25 V regulator that powers the Digital Supply Voltage (DVDD) + pin. + + vdrive-supply: + description: + A 2.3 to 5.25 V regulator that powers the Logic Power Supply Input + (VDrive) pin. + + clocks: + maxItems: 1 + description: External oscillator clock (CLKIN). + + reset-gpios: + description: + GPIO connected to the /RESET pin. As the line needs to be low for the + reset to be active, it should be configured as GPIO_ACTIVE_LOW. + maxItems: 1 + + sample-gpios: + description: + GPIO connected to the /SAMPLE pin. As the line needs to be low to trigger + a sample, it should be configured as GPIO_ACTIVE_LOW. + maxItems: 1 + + mode-gpios: + description: + GPIO lines connected to the A0 and A1 pins. These pins select the data + transfer mode. + minItems: 2 + maxItems: 2 + + resolution-gpios: + description: + GPIO lines connected to the RES0 and RES1 pins. These pins select the + resolution of the digital output. If omitted, it is assumed that the + RES0 and RES1 pins are hard-wired to match the assigned-resolution-bits + property. + minItems: 2 + maxItems: 2 + + fault-gpios: + description: + GPIO lines connected to the LOT and DOS pins. These pins combined indicate + the type of fault present, if any. As these pins a pulled low to indicate + a fault condition, they should be configured as GPIO_ACTIVE_LOW. + minItems: 2 + maxItems: 2 + + adi,fixed-mode: + description: + This is used to indicate the selected mode if A0 and A1 are hard-wired + instead of connected to GPIOS (i.e. mode-gpios is omitted). + $ref: /schemas/types.yaml#/definitions/string + enum: [config, velocity, position] + + assigned-resolution-bits: + description: + Resolution of the digital output required by the application. This + determines the precision of the angle and/or the maximum speed that can + be measured. If resolution-gpios is omitted, it is assumed that RES0 and + RES1 are hard-wired to match this value. + enum: [10, 12, 14, 16] + +required: + - compatible + - reg + - spi-cpha + - avdd-supply + - dvdd-supply + - vdrive-supply + - clocks + - sample-gpios + - assigned-resolution-bits + +oneOf: + - required: + - mode-gpios + - required: + - adi,fixed-mode + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + + spi { + #address-cells = <1>; + #size-cells = <0>; + + resolver@0 { + compatible = "adi,ad2s1210"; + reg = <0>; + spi-max-frequency = <20000000>; + spi-cpha; + avdd-supply = <&avdd_regulator>; + dvdd-supply = <&dvdd_regulator>; + vdrive-supply = <&vdrive_regulator>; + clocks = <&ext_osc>; + sample-gpios = <&gpio0 90 GPIO_ACTIVE_LOW>; + mode-gpios = <&gpio0 86 0>, <&gpio0 87 0>; + resolution-gpios = <&gpio0 88 0>, <&gpio0 89 0>; + assigned-resolution-bits = <16>; + }; + };