| Message ID | 20231005145420.169594-1-benjamin.gaignard@collabora.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: dts: rockchip: rk3588is: Add AV1 decoder node | expand |
Hi, On Thu, Oct 05, 2023 at 04:54:20PM +0200, Benjamin Gaignard wrote: > Add node for AV1 video decoder. > > Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com> > Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> No need for my SoB. Instead have this one: Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com> Also worth mentioning, that this Patch needs one small fix in the DT binding (adding "resets") and one small fix in the driver for out of the box AV1 support: https://lore.kernel.org/all/20231005144934.169356-1-benjamin.gaignard@collabora.com/ https://lore.kernel.org/all/20231005145116.169411-1-benjamin.gaignard@collabora.com/ Greetings, -- Sebastian > --- > arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > > diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > index 5544f66c6ff4..835e66d85d5f 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > @@ -2304,6 +2304,20 @@ gpio4: gpio@fec50000 { > #interrupt-cells = <2>; > }; > }; > + > + av1d: av1d@fdc70000 { > + compatible = "rockchip,rk3588-av1-vpu"; > + reg = <0x0 0xfdc70000 0x0 0x800>; > + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 0>; > + interrupt-names = "vdpu"; > + clocks = <&cru ACLK_AV1>, <&cru PCLK_AV1>; > + clock-names = "aclk", "hclk"; > + assigned-clocks = <&cru ACLK_AV1>, <&cru PCLK_AV1>; > + assigned-clock-rates = <400000000>, <400000000>; > + resets = <&cru SRST_A_AV1>, <&cru SRST_P_AV1>, <&cru SRST_A_AV1_BIU>, <&cru SRST_P_AV1_BIU>; > + power-domains = <&power RK3588_PD_AV1>; > + status = "okay"; > + }; > }; > > #include "rk3588s-pinctrl.dtsi" > -- > 2.39.2 >
Am Donnerstag, 5. Oktober 2023, 17:12:10 CEST schrieb Sebastian Reichel: > Hi, > > On Thu, Oct 05, 2023 at 04:54:20PM +0200, Benjamin Gaignard wrote: > > Add node for AV1 video decoder. > > > > Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com> > > Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> > > No need for my SoB. Instead have this one: > > Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com> > > Also worth mentioning, that this Patch needs one small fix in the DT > binding (adding "resets") and one small fix in the driver for out of > the box AV1 support: > > https://lore.kernel.org/all/20231005144934.169356-1-benjamin.gaignard@collabora.com/ > https://lore.kernel.org/all/20231005145116.169411-1-benjamin.gaignard@collabora.com/ additionally the node name should be generic. The phandle can of course be av1d but the node name itself needs a change. Heiko > > --- > > arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 14 ++++++++++++++ > > 1 file changed, 14 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > > index 5544f66c6ff4..835e66d85d5f 100644 > > --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > > +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > > @@ -2304,6 +2304,20 @@ gpio4: gpio@fec50000 { > > #interrupt-cells = <2>; > > }; > > }; > > + > > + av1d: av1d@fdc70000 { > > + compatible = "rockchip,rk3588-av1-vpu"; > > + reg = <0x0 0xfdc70000 0x0 0x800>; > > + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 0>; > > + interrupt-names = "vdpu"; > > + clocks = <&cru ACLK_AV1>, <&cru PCLK_AV1>; > > + clock-names = "aclk", "hclk"; > > + assigned-clocks = <&cru ACLK_AV1>, <&cru PCLK_AV1>; > > + assigned-clock-rates = <400000000>, <400000000>; > > + resets = <&cru SRST_A_AV1>, <&cru SRST_P_AV1>, <&cru SRST_A_AV1_BIU>, <&cru SRST_P_AV1_BIU>; > > + power-domains = <&power RK3588_PD_AV1>; > > + status = "okay"; > > + }; > > }; > > > > #include "rk3588s-pinctrl.dtsi" >
Le 05/10/2023 à 17:30, Heiko Stuebner a écrit : > Am Donnerstag, 5. Oktober 2023, 17:12:10 CEST schrieb Sebastian Reichel: >> Hi, >> >> On Thu, Oct 05, 2023 at 04:54:20PM +0200, Benjamin Gaignard wrote: >>> Add node for AV1 video decoder. >>> >>> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com> >>> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> >> No need for my SoB. Instead have this one: >> >> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com> >> >> Also worth mentioning, that this Patch needs one small fix in the DT >> binding (adding "resets") and one small fix in the driver for out of >> the box AV1 support: >> >> https://lore.kernel.org/all/20231005144934.169356-1-benjamin.gaignard@collabora.com/ >> https://lore.kernel.org/all/20231005145116.169411-1-benjamin.gaignard@collabora.com/ > additionally the node name should be generic. > The phandle can of course be av1d but the node > name itself needs a change. Does "video-codec-av1@fdc70000" sound good for you ? > > Heiko > > >>> --- >>> arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 14 ++++++++++++++ >>> 1 file changed, 14 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi >>> index 5544f66c6ff4..835e66d85d5f 100644 >>> --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi >>> +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi >>> @@ -2304,6 +2304,20 @@ gpio4: gpio@fec50000 { >>> #interrupt-cells = <2>; >>> }; >>> }; >>> + >>> + av1d: av1d@fdc70000 { >>> + compatible = "rockchip,rk3588-av1-vpu"; >>> + reg = <0x0 0xfdc70000 0x0 0x800>; >>> + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 0>; >>> + interrupt-names = "vdpu"; >>> + clocks = <&cru ACLK_AV1>, <&cru PCLK_AV1>; >>> + clock-names = "aclk", "hclk"; >>> + assigned-clocks = <&cru ACLK_AV1>, <&cru PCLK_AV1>; >>> + assigned-clock-rates = <400000000>, <400000000>; >>> + resets = <&cru SRST_A_AV1>, <&cru SRST_P_AV1>, <&cru SRST_A_AV1_BIU>, <&cru SRST_P_AV1_BIU>; >>> + power-domains = <&power RK3588_PD_AV1>; >>> + status = "okay"; >>> + }; >>> }; >>> >>> #include "rk3588s-pinctrl.dtsi" > > >
Am Donnerstag, 5. Oktober 2023, 17:39:18 CEST schrieb Benjamin Gaignard: > > Le 05/10/2023 à 17:30, Heiko Stuebner a écrit : > > Am Donnerstag, 5. Oktober 2023, 17:12:10 CEST schrieb Sebastian Reichel: > >> Hi, > >> > >> On Thu, Oct 05, 2023 at 04:54:20PM +0200, Benjamin Gaignard wrote: > >>> Add node for AV1 video decoder. > >>> > >>> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com> > >>> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> > >> No need for my SoB. Instead have this one: > >> > >> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com> > >> > >> Also worth mentioning, that this Patch needs one small fix in the DT > >> binding (adding "resets") and one small fix in the driver for out of > >> the box AV1 support: > >> > >> https://lore.kernel.org/all/20231005144934.169356-1-benjamin.gaignard@collabora.com/ > >> https://lore.kernel.org/all/20231005145116.169411-1-benjamin.gaignard@collabora.com/ > > additionally the node name should be generic. > > The phandle can of course be av1d but the node > > name itself needs a change. > > Does "video-codec-av1@fdc70000" sound good for you ? Nope ... please go with video-codec@fdc... I.e. see the other Rockchip soc dtsi for reference. Thanks Heiko
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index 5544f66c6ff4..835e66d85d5f 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -2304,6 +2304,20 @@ gpio4: gpio@fec50000 { #interrupt-cells = <2>; }; }; + + av1d: av1d@fdc70000 { + compatible = "rockchip,rk3588-av1-vpu"; + reg = <0x0 0xfdc70000 0x0 0x800>; + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 0>; + interrupt-names = "vdpu"; + clocks = <&cru ACLK_AV1>, <&cru PCLK_AV1>; + clock-names = "aclk", "hclk"; + assigned-clocks = <&cru ACLK_AV1>, <&cru PCLK_AV1>; + assigned-clock-rates = <400000000>, <400000000>; + resets = <&cru SRST_A_AV1>, <&cru SRST_P_AV1>, <&cru SRST_A_AV1_BIU>, <&cru SRST_P_AV1_BIU>; + power-domains = <&power RK3588_PD_AV1>; + status = "okay"; + }; }; #include "rk3588s-pinctrl.dtsi"