| Message ID | 20231009024932.2563622-7-li.meng@amd.com (mailing list archive) |
|---|---|
| State | Superseded, archived |
| Headers | show |
| Series | amd-pstate preferred core | expand |
On 09 Oct 10:49, Meng Li wrote: > Introduce amd-pstate preferred core. > > check preferred core state set by the kernel parameter: > $ cat /sys/devices/system/cpu/amd-pstate/prefcore > > Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> > Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Wyes Karny <wyes.karny@amd.com> > Signed-off-by: Meng Li <li.meng@amd.com> > --- > Documentation/admin-guide/pm/amd-pstate.rst | 59 ++++++++++++++++++++- > 1 file changed, 57 insertions(+), 2 deletions(-) > > diff --git a/Documentation/admin-guide/pm/amd-pstate.rst b/Documentation/admin-guide/pm/amd-pstate.rst > index 1cf40f69278c..0b832ff529db 100644 > --- a/Documentation/admin-guide/pm/amd-pstate.rst > +++ b/Documentation/admin-guide/pm/amd-pstate.rst > @@ -300,8 +300,8 @@ platforms. The AMD P-States mechanism is the more performance and energy > efficiency frequency management method on AMD processors. > > > -AMD Pstate Driver Operation Modes > -================================= > +``amd-pstate`` Driver Operation Modes > +====================================== > > ``amd_pstate`` CPPC has 3 operation modes: autonomous (active) mode, > non-autonomous (passive) mode and guided autonomous (guided) mode. > @@ -353,6 +353,48 @@ is activated. In this mode, driver requests minimum and maximum performance > level and the platform autonomously selects a performance level in this range > and appropriate to the current workload. > > +``amd-pstate`` Preferred Core > +================================= > + > +The core frequency is subjected to the process variation in semiconductors. > +Not all cores are able to reach the maximum frequency respecting the > +infrastructure limits. Consequently, AMD has redefined the concept of > +maximum frequency of a part. This means that a fraction of cores can reach > +maximum frequency. To find the best process scheduling policy for a given > +scenario, OS needs to know the core ordering informed by the platform through > +highest performance capability register of the CPPC interface. > + > +``amd-pstate`` preferred core enables the scheduler to prefer scheduling on > +cores that can achieve a higher frequency with lower voltage. The preferred > +core rankings can dynamically change based on the workload, platform conditions, > +thermals and ageing. > + > +The priority metric will be initialized by the ``amd-pstate`` driver. The ``amd-pstate`` > +driver will also determine whether or not ``amd-pstate`` preferred core is > +supported by the platform. > + > +``amd-pstate`` driver will provide an initial core ordering when the system boots. > +The platform uses the CPPC interfaces to communicate the core ranking to the > +operating system and scheduler to make sure that OS is choosing the cores > +with highest performance firstly for scheduling the process. When ``amd-pstate`` > +driver receives a message with the highest performance change, it will > +update the core ranking and set the cpu's priority. > + > +``amd-pstate`` Preferred Core Switch > +================================= > +Kernel Parameters > +----------------- > + > +``amd-pstate`` peferred core`` has two states: enable and disable. > +Enable/disable states can be chosen by different kernel parameters. > +Default enable ``amd-pstate`` preferred core. > + > +``amd_prefcore=disable`` > + > +For systems that support ``amd-pstate`` preferred core, the core rankings will > +always be advertised by the platform. But OS can choose to ignore that via the > +kernel parameter ``amd_prefcore=disable``. > + > User Space Interface in ``sysfs`` - General > =========================================== > > @@ -385,6 +427,19 @@ control its functionality at the system level. They are located in the > to the operation mode represented by that string - or to be > unregistered in the "disable" case. > > +``prefcore`` > + Preferred core state of the driver: "enabled" or "disabled". > + > + "enabled" > + Enable the ``amd-pstate`` preferred core. > + > + "disabled" > + Disable the ``amd-pstate`` preferred core > + > + > + This attribute is read-only to check the state of preferred core set > + by the kernel parameter. > + > ``cpupower`` tool support for ``amd-pstate`` > =============================================== > > -- > 2.34.1 >
diff --git a/Documentation/admin-guide/pm/amd-pstate.rst b/Documentation/admin-guide/pm/amd-pstate.rst index 1cf40f69278c..0b832ff529db 100644 --- a/Documentation/admin-guide/pm/amd-pstate.rst +++ b/Documentation/admin-guide/pm/amd-pstate.rst @@ -300,8 +300,8 @@ platforms. The AMD P-States mechanism is the more performance and energy efficiency frequency management method on AMD processors. -AMD Pstate Driver Operation Modes -================================= +``amd-pstate`` Driver Operation Modes +====================================== ``amd_pstate`` CPPC has 3 operation modes: autonomous (active) mode, non-autonomous (passive) mode and guided autonomous (guided) mode. @@ -353,6 +353,48 @@ is activated. In this mode, driver requests minimum and maximum performance level and the platform autonomously selects a performance level in this range and appropriate to the current workload. +``amd-pstate`` Preferred Core +================================= + +The core frequency is subjected to the process variation in semiconductors. +Not all cores are able to reach the maximum frequency respecting the +infrastructure limits. Consequently, AMD has redefined the concept of +maximum frequency of a part. This means that a fraction of cores can reach +maximum frequency. To find the best process scheduling policy for a given +scenario, OS needs to know the core ordering informed by the platform through +highest performance capability register of the CPPC interface. + +``amd-pstate`` preferred core enables the scheduler to prefer scheduling on +cores that can achieve a higher frequency with lower voltage. The preferred +core rankings can dynamically change based on the workload, platform conditions, +thermals and ageing. + +The priority metric will be initialized by the ``amd-pstate`` driver. The ``amd-pstate`` +driver will also determine whether or not ``amd-pstate`` preferred core is +supported by the platform. + +``amd-pstate`` driver will provide an initial core ordering when the system boots. +The platform uses the CPPC interfaces to communicate the core ranking to the +operating system and scheduler to make sure that OS is choosing the cores +with highest performance firstly for scheduling the process. When ``amd-pstate`` +driver receives a message with the highest performance change, it will +update the core ranking and set the cpu's priority. + +``amd-pstate`` Preferred Core Switch +================================= +Kernel Parameters +----------------- + +``amd-pstate`` peferred core`` has two states: enable and disable. +Enable/disable states can be chosen by different kernel parameters. +Default enable ``amd-pstate`` preferred core. + +``amd_prefcore=disable`` + +For systems that support ``amd-pstate`` preferred core, the core rankings will +always be advertised by the platform. But OS can choose to ignore that via the +kernel parameter ``amd_prefcore=disable``. + User Space Interface in ``sysfs`` - General =========================================== @@ -385,6 +427,19 @@ control its functionality at the system level. They are located in the to the operation mode represented by that string - or to be unregistered in the "disable" case. +``prefcore`` + Preferred core state of the driver: "enabled" or "disabled". + + "enabled" + Enable the ``amd-pstate`` preferred core. + + "disabled" + Disable the ``amd-pstate`` preferred core + + + This attribute is read-only to check the state of preferred core set + by the kernel parameter. + ``cpupower`` tool support for ``amd-pstate`` ===============================================