Message ID | 20231006114145.18718-1-ddrokosov@salutedevices.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [v1] arm64: dts: amlogic: a1: support all i2c masters and their muxes | expand |
On 06/10/2023 13:41, Dmitry Rokosov wrote: > A1 SoC family has four i2c masters: i2c0 (I2CM_A), i2c1 (I2CM_B), i2c2 > (I2CM_C) and i2c3 (I2CM_D). > > Signed-off-by: George Stark <gnstark@salutedevices.com> > Signed-off-by: Dmitry Rokosov <ddrokosov@salutedevices.com> > --- > arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 144 ++++++++++++++++++++++ > 1 file changed, 144 insertions(+) > > diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi > index 823714bcb7a0..f53000a5d0cc 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi > +++ b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi > @@ -126,6 +126,106 @@ gpio: bank@400 { > gpio-ranges = <&periphs_pinctrl 0 0 62>; > }; > > + i2c0_f11_pins: i2c0-f11 { > + mux { > + groups = "i2c0_sck_f11", > + "i2c0_sda_f12"; > + function = "i2c0"; > + bias-pull-up; > + drive-strength-microamp = <3000>; > + }; > + }; > + > + i2c0_f9_pins: i2c0-f9 { > + mux { > + groups = "i2c0_sck_f9", > + "i2c0_sda_f10"; > + function = "i2c0"; > + bias-pull-up; > + drive-strength-microamp = <3000>; > + }; > + }; > + > + i2c1_x_pins: i2c1-x { > + mux { > + groups = "i2c1_sck_x", > + "i2c1_sda_x"; > + function = "i2c1"; > + bias-pull-up; > + drive-strength-microamp = <3000>; > + }; > + }; > + > + i2c1_a_pins: i2c1-a { > + mux { > + groups = "i2c1_sck_a", > + "i2c1_sda_a"; > + function = "i2c1"; > + bias-pull-up; > + drive-strength-microamp = <3000>; > + }; > + }; > + > + i2c2_x0_pins: i2c2-x0 { > + mux { > + groups = "i2c2_sck_x0", > + "i2c2_sda_x1"; > + function = "i2c2"; > + bias-pull-up; > + drive-strength-microamp = <3000>; > + }; > + }; > + > + i2c2_x15_pins: i2c2-x15 { > + mux { > + groups = "i2c2_sck_x15", > + "i2c2_sda_x16"; > + function = "i2c2"; > + bias-pull-up; > + drive-strength-microamp = <3000>; > + }; > + }; > + > + i2c2_a4_pins: i2c2-a4 { > + mux { > + groups = "i2c2_sck_a4", > + "i2c2_sda_a5"; > + function = "i2c2"; > + bias-pull-up; > + drive-strength-microamp = <3000>; > + }; > + }; > + > + i2c2_a8_pins: i2c2-a8 { > + mux { > + groups = "i2c2_sck_a8", > + "i2c2_sda_a9"; > + function = "i2c2"; > + bias-pull-up; > + drive-strength-microamp = <3000>; > + }; > + }; > + > + i2c3_x_pins: i2c3-x { > + mux { > + groups = "i2c3_sck_x", > + "i2c3_sda_x"; > + function = "i2c3"; > + bias-pull-up; > + drive-strength-microamp = <3000>; > + }; > + }; > + > + i2c3_f_pins: i2c3-f { > + mux { > + groups = "i2c3_sck_f", > + "i2c3_sda_f"; > + function = "i2c3"; > + bias-pull-up; > + drive-strength-microamp = <3000>; > + }; > + }; > + > uart_a_pins: uart-a { > mux { > groups = "uart_a_tx", > @@ -377,6 +477,17 @@ clkc_periphs: clock-controller@800 { > "hifi_pll", "xtal"; > }; > > + i2c0: i2c@1400 { > + compatible = "amlogic,meson-axg-i2c"; > + status = "disabled"; > + reg = <0x0 0x1400 0x0 0x20>; > + interrupts = <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>; > + #address-cells = <1>; > + #size-cells = <0>; > + clocks = <&clkc_periphs CLKID_I2C_M_A>; > + power-domains = <&pwrc PWRC_I2C_ID>; > + }; > + > uart_AO: serial@1c00 { > compatible = "amlogic,meson-a1-uart", > "amlogic,meson-ao-uart"; > @@ -437,6 +548,39 @@ saradc: adc@2c00 { > status = "disabled"; > }; > > + i2c1: i2c@5c00 { > + compatible = "amlogic,meson-axg-i2c"; > + status = "disabled"; > + reg = <0x0 0x5c00 0x0 0x20>; > + interrupts = <GIC_SPI 68 IRQ_TYPE_EDGE_RISING>; > + #address-cells = <1>; > + #size-cells = <0>; > + clocks = <&clkc_periphs CLKID_I2C_M_B>; > + power-domains = <&pwrc PWRC_I2C_ID>; > + }; > + > + i2c2: i2c@6800 { > + compatible = "amlogic,meson-axg-i2c"; > + status = "disabled"; > + reg = <0x0 0x6800 0x0 0x20>; > + interrupts = <GIC_SPI 76 IRQ_TYPE_EDGE_RISING>; > + #address-cells = <1>; > + #size-cells = <0>; > + clocks = <&clkc_periphs CLKID_I2C_M_C>; > + power-domains = <&pwrc PWRC_I2C_ID>; > + }; > + > + i2c3: i2c@6c00 { > + compatible = "amlogic,meson-axg-i2c"; > + status = "disabled"; > + reg = <0x0 0x6c00 0x0 0x20>; > + interrupts = <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>; > + #address-cells = <1>; > + #size-cells = <0>; > + clocks = <&clkc_periphs CLKID_I2C_M_D>; > + power-domains = <&pwrc PWRC_I2C_ID>; > + }; > + > usb2_phy1: phy@4000 { > compatible = "amlogic,a1-usb2-phy"; > clocks = <&clkc_periphs CLKID_USB_PHY_IN>; Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Hi, On Fri, 06 Oct 2023 14:41:45 +0300, Dmitry Rokosov wrote: > A1 SoC family has four i2c masters: i2c0 (I2CM_A), i2c1 (I2CM_B), i2c2 > (I2CM_C) and i2c3 (I2CM_D). > > Thanks, Applied to https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux.git (v6.7/arm64-dt) [1/1] arm64: dts: amlogic: a1: support all i2c masters and their muxes https://git.kernel.org/amlogic/c/f2d2200e47e942e4df16f0fe8a30aa1d91e4831a These changes has been applied on the intermediate git tree [1]. The v6.7/arm64-dt branch will then be sent via a formal Pull Request to the Linux SoC maintainers for inclusion in their intermediate git branches in order to be sent to Linus during the next merge window, or sooner if it's a set of fixes. In the cases of fixes, those will be merged in the current release candidate kernel and as soon they appear on the Linux master branch they will be backported to the previous Stable and Long-Stable kernels [2]. The intermediate git branches are merged daily in the linux-next tree [3], people are encouraged testing these pre-release kernels and report issues on the relevant mailing-lists. If problems are discovered on those changes, please submit a signed-off-by revert patch followed by a corrective changeset. [1] https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux.git [2] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git [3] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi index 823714bcb7a0..f53000a5d0cc 100644 --- a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi @@ -126,6 +126,106 @@ gpio: bank@400 { gpio-ranges = <&periphs_pinctrl 0 0 62>; }; + i2c0_f11_pins: i2c0-f11 { + mux { + groups = "i2c0_sck_f11", + "i2c0_sda_f12"; + function = "i2c0"; + bias-pull-up; + drive-strength-microamp = <3000>; + }; + }; + + i2c0_f9_pins: i2c0-f9 { + mux { + groups = "i2c0_sck_f9", + "i2c0_sda_f10"; + function = "i2c0"; + bias-pull-up; + drive-strength-microamp = <3000>; + }; + }; + + i2c1_x_pins: i2c1-x { + mux { + groups = "i2c1_sck_x", + "i2c1_sda_x"; + function = "i2c1"; + bias-pull-up; + drive-strength-microamp = <3000>; + }; + }; + + i2c1_a_pins: i2c1-a { + mux { + groups = "i2c1_sck_a", + "i2c1_sda_a"; + function = "i2c1"; + bias-pull-up; + drive-strength-microamp = <3000>; + }; + }; + + i2c2_x0_pins: i2c2-x0 { + mux { + groups = "i2c2_sck_x0", + "i2c2_sda_x1"; + function = "i2c2"; + bias-pull-up; + drive-strength-microamp = <3000>; + }; + }; + + i2c2_x15_pins: i2c2-x15 { + mux { + groups = "i2c2_sck_x15", + "i2c2_sda_x16"; + function = "i2c2"; + bias-pull-up; + drive-strength-microamp = <3000>; + }; + }; + + i2c2_a4_pins: i2c2-a4 { + mux { + groups = "i2c2_sck_a4", + "i2c2_sda_a5"; + function = "i2c2"; + bias-pull-up; + drive-strength-microamp = <3000>; + }; + }; + + i2c2_a8_pins: i2c2-a8 { + mux { + groups = "i2c2_sck_a8", + "i2c2_sda_a9"; + function = "i2c2"; + bias-pull-up; + drive-strength-microamp = <3000>; + }; + }; + + i2c3_x_pins: i2c3-x { + mux { + groups = "i2c3_sck_x", + "i2c3_sda_x"; + function = "i2c3"; + bias-pull-up; + drive-strength-microamp = <3000>; + }; + }; + + i2c3_f_pins: i2c3-f { + mux { + groups = "i2c3_sck_f", + "i2c3_sda_f"; + function = "i2c3"; + bias-pull-up; + drive-strength-microamp = <3000>; + }; + }; + uart_a_pins: uart-a { mux { groups = "uart_a_tx", @@ -377,6 +477,17 @@ clkc_periphs: clock-controller@800 { "hifi_pll", "xtal"; }; + i2c0: i2c@1400 { + compatible = "amlogic,meson-axg-i2c"; + status = "disabled"; + reg = <0x0 0x1400 0x0 0x20>; + interrupts = <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clkc_periphs CLKID_I2C_M_A>; + power-domains = <&pwrc PWRC_I2C_ID>; + }; + uart_AO: serial@1c00 { compatible = "amlogic,meson-a1-uart", "amlogic,meson-ao-uart"; @@ -437,6 +548,39 @@ saradc: adc@2c00 { status = "disabled"; }; + i2c1: i2c@5c00 { + compatible = "amlogic,meson-axg-i2c"; + status = "disabled"; + reg = <0x0 0x5c00 0x0 0x20>; + interrupts = <GIC_SPI 68 IRQ_TYPE_EDGE_RISING>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clkc_periphs CLKID_I2C_M_B>; + power-domains = <&pwrc PWRC_I2C_ID>; + }; + + i2c2: i2c@6800 { + compatible = "amlogic,meson-axg-i2c"; + status = "disabled"; + reg = <0x0 0x6800 0x0 0x20>; + interrupts = <GIC_SPI 76 IRQ_TYPE_EDGE_RISING>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clkc_periphs CLKID_I2C_M_C>; + power-domains = <&pwrc PWRC_I2C_ID>; + }; + + i2c3: i2c@6c00 { + compatible = "amlogic,meson-axg-i2c"; + status = "disabled"; + reg = <0x0 0x6c00 0x0 0x20>; + interrupts = <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clkc_periphs CLKID_I2C_M_D>; + power-domains = <&pwrc PWRC_I2C_ID>; + }; + usb2_phy1: phy@4000 { compatible = "amlogic,a1-usb2-phy"; clocks = <&clkc_periphs CLKID_USB_PHY_IN>;