diff mbox series

[v2] drm/i915/lnl: Remove watchdog timers for PSR

Message ID 20231009141303.577061-1-mika.kahola@intel.com (mailing list archive)
State New, archived
Headers show
Series [v2] drm/i915/lnl: Remove watchdog timers for PSR | expand

Commit Message

Kahola, Mika Oct. 9, 2023, 2:13 p.m. UTC
Currently we are not using watchdog timers for PSR/PSR2
with Lunarlake. The patch removes the use of these timers
from the driver code.

BSpec: 69895

v2: Reword commit message (Ville)
    Drop HPD mask from LNL (Ville)
    Revise masking logic (Jouni)

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

Comments

Ville Syrjala Oct. 9, 2023, 2:57 p.m. UTC | #1
On Mon, Oct 09, 2023 at 05:13:03PM +0300, Mika Kahola wrote:
> Currently we are not using watchdog timers for PSR/PSR2
> with Lunarlake. The patch removes the use of these timers
> from the driver code.

That still doesn't seem to say that the timers were removed
from the hardware. Or at least I can't parse it that way.

> 
> BSpec: 69895
> 
> v2: Reword commit message (Ville)
>     Drop HPD mask from LNL (Ville)

That should probably be a separate patch since it has nothing to do
with what the commit message is saying.

>     Revise masking logic (Jouni)
> 
> Signed-off-by: Mika Kahola <mika.kahola@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 12 ++++++++----
>  1 file changed, 8 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index 850b11f20285..abdafd04d8e3 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -676,7 +676,9 @@ static void hsw_activate_psr1(struct intel_dp *intel_dp)
>  
>  	val |= EDP_PSR_IDLE_FRAMES(psr_compute_idle_frames(intel_dp));
>  
> -	val |= EDP_PSR_MAX_SLEEP_TIME(max_sleep_time);
> +	if (DISPLAY_VER(dev_priv) < 20)
> +		val |= EDP_PSR_MAX_SLEEP_TIME(max_sleep_time);
> +
>  	if (IS_HASWELL(dev_priv))
>  		val |= EDP_PSR_MIN_LINK_ENTRY_TIME_8_LINES;
>  
> @@ -1399,9 +1401,11 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp,
>  	 * can rely on frontbuffer tracking.
>  	 */
>  	mask = EDP_PSR_DEBUG_MASK_MEMUP |
> -	       EDP_PSR_DEBUG_MASK_HPD |
> -	       EDP_PSR_DEBUG_MASK_LPSP |
> -	       EDP_PSR_DEBUG_MASK_MAX_SLEEP;
> +	       EDP_PSR_DEBUG_MASK_LPSP;
> +
> +	if (DISPLAY_VER(dev_priv) < 20)
> +		mask |= EDP_PSR_DEBUG_MASK_HPD |
> +			EDP_PSR_DEBUG_MASK_MAX_SLEEP;
>  
>  	/*
>  	 * No separate pipe reg write mask on hsw/bdw, so have to unmask all
> -- 
> 2.34.1
Kahola, Mika Oct. 10, 2023, 6:31 a.m. UTC | #2
> -----Original Message-----
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Sent: Monday, October 9, 2023 5:58 PM
> To: Kahola, Mika <mika.kahola@intel.com>
> Cc: intel-gfx@lists.freedesktop.org; Hogander, Jouni <jouni.hogander@intel.com>
> Subject: Re: [PATCH v2] drm/i915/lnl: Remove watchdog timers for PSR
> 
> On Mon, Oct 09, 2023 at 05:13:03PM +0300, Mika Kahola wrote:
> > Currently we are not using watchdog timers for PSR/PSR2 with
> > Lunarlake. The patch removes the use of these timers from the driver
> > code.
> 
> That still doesn't seem to say that the timers were removed from the hardware. Or at least I can't parse it that way.
Ok, I will make another pass on commit message and drop the HPD mask as it really isn't part of this patch.

Thanks!

> 
> >
> > BSpec: 69895
> >
> > v2: Reword commit message (Ville)
> >     Drop HPD mask from LNL (Ville)
> 
> That should probably be a separate patch since it has nothing to do with what the commit message is saying.
> 
> >     Revise masking logic (Jouni)
> >
> > Signed-off-by: Mika Kahola <mika.kahola@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_psr.c | 12 ++++++++----
> >  1 file changed, 8 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > b/drivers/gpu/drm/i915/display/intel_psr.c
> > index 850b11f20285..abdafd04d8e3 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -676,7 +676,9 @@ static void hsw_activate_psr1(struct intel_dp
> > *intel_dp)
> >
> >  	val |= EDP_PSR_IDLE_FRAMES(psr_compute_idle_frames(intel_dp));
> >
> > -	val |= EDP_PSR_MAX_SLEEP_TIME(max_sleep_time);
> > +	if (DISPLAY_VER(dev_priv) < 20)
> > +		val |= EDP_PSR_MAX_SLEEP_TIME(max_sleep_time);
> > +
> >  	if (IS_HASWELL(dev_priv))
> >  		val |= EDP_PSR_MIN_LINK_ENTRY_TIME_8_LINES;
> >
> > @@ -1399,9 +1401,11 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp,
> >  	 * can rely on frontbuffer tracking.
> >  	 */
> >  	mask = EDP_PSR_DEBUG_MASK_MEMUP |
> > -	       EDP_PSR_DEBUG_MASK_HPD |
> > -	       EDP_PSR_DEBUG_MASK_LPSP |
> > -	       EDP_PSR_DEBUG_MASK_MAX_SLEEP;
> > +	       EDP_PSR_DEBUG_MASK_LPSP;
> > +
> > +	if (DISPLAY_VER(dev_priv) < 20)
> > +		mask |= EDP_PSR_DEBUG_MASK_HPD |
> > +			EDP_PSR_DEBUG_MASK_MAX_SLEEP;
> >
> >  	/*
> >  	 * No separate pipe reg write mask on hsw/bdw, so have to unmask all
> > --
> > 2.34.1
> 
> --
> Ville Syrjälä
> Intel
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 850b11f20285..abdafd04d8e3 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -676,7 +676,9 @@  static void hsw_activate_psr1(struct intel_dp *intel_dp)
 
 	val |= EDP_PSR_IDLE_FRAMES(psr_compute_idle_frames(intel_dp));
 
-	val |= EDP_PSR_MAX_SLEEP_TIME(max_sleep_time);
+	if (DISPLAY_VER(dev_priv) < 20)
+		val |= EDP_PSR_MAX_SLEEP_TIME(max_sleep_time);
+
 	if (IS_HASWELL(dev_priv))
 		val |= EDP_PSR_MIN_LINK_ENTRY_TIME_8_LINES;
 
@@ -1399,9 +1401,11 @@  static void intel_psr_enable_source(struct intel_dp *intel_dp,
 	 * can rely on frontbuffer tracking.
 	 */
 	mask = EDP_PSR_DEBUG_MASK_MEMUP |
-	       EDP_PSR_DEBUG_MASK_HPD |
-	       EDP_PSR_DEBUG_MASK_LPSP |
-	       EDP_PSR_DEBUG_MASK_MAX_SLEEP;
+	       EDP_PSR_DEBUG_MASK_LPSP;
+
+	if (DISPLAY_VER(dev_priv) < 20)
+		mask |= EDP_PSR_DEBUG_MASK_HPD |
+			EDP_PSR_DEBUG_MASK_MAX_SLEEP;
 
 	/*
 	 * No separate pipe reg write mask on hsw/bdw, so have to unmask all