| Message ID | 20231011081649.3226792-2-oliver.upton@linux.dev (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | KVM: arm64: vPMU fixes for NV/EL2 | expand |
On 2023-10-11 09:16, Oliver Upton wrote: > The existing PMU emulation code is inadequate for use with nested > virt. Disable the feature altogether with NV until the hypervisor > controls are handled correctly. Could you at least mention *what* is missing? Most of the handling should identical, and the couple of bits what would need to be handled (such as MDCR_EL2) are not covered by this disabling. As it is stands, I'm not there is much to be gained from this. Thanks, M.
On Wed, Oct 11, 2023 at 04:54:49PM +0100, Marc Zyngier wrote: > On 2023-10-11 09:16, Oliver Upton wrote: > > The existing PMU emulation code is inadequate for use with nested > > virt. Disable the feature altogether with NV until the hypervisor > > controls are handled correctly. > > Could you at least mention *what* is missing? Most of the handling > should identical, and the couple of bits what would need to be > handled (such as MDCR_EL2) are not covered by this disabling. Heh, I could've spelled it out a bit more :) The part that caught my attention is that we don't honor the NSH bit (hence the next patch), and doing that correctly isn't going to be trivial. In cases where event filtering is mismatched between vEL2 and EL1 I think we need to reprogram the associated perf events on nested transitions. We could probably optimize this by using two sets of perf events to make the switch a bit faster, but that's beside the point. Looks like MDCR_EL2.{HPMN,HPME} aren't handled yet either. These are all easy enough to work on (and my interest is certainly piqued), but it seems to me PMU+NV isn't going to work out of the gate. It'd be nice to permit the combination only when we're confident the feature is complete. I haven't any strong opinions here though, and you're the one carrying the whole NV pile in the first place. Up to you what to do here.
diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c index 1bfdd583b261..356b7eec3c93 100644 --- a/arch/arm64/kvm/arm.c +++ b/arch/arm64/kvm/arm.c @@ -1238,9 +1238,10 @@ static int kvm_vcpu_init_check_features(struct kvm_vcpu *vcpu, test_bit(KVM_ARM_VCPU_PTRAUTH_GENERIC, &features)) return -EINVAL; - /* Disallow NV+SVE for the time being */ + /* Disallow PMU and SVE with NV for the time being */ if (test_bit(KVM_ARM_VCPU_HAS_EL2, &features) && - test_bit(KVM_ARM_VCPU_SVE, &features)) + (test_bit(KVM_ARM_VCPU_SVE, &features) || + test_bit(KVM_ARM_VCPU_PMU_V3, &features))) return -EINVAL; if (!test_bit(KVM_ARM_VCPU_EL1_32BIT, &features))
The existing PMU emulation code is inadequate for use with nested virt. Disable the feature altogether with NV until the hypervisor controls are handled correctly. Signed-off-by: Oliver Upton <oliver.upton@linux.dev> --- arch/arm64/kvm/arm.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)