diff mbox series

[v3] drm/i915/lnl: Remove watchdog timers for PSR

Message ID 20231010095233.590613-1-mika.kahola@intel.com (mailing list archive)
State New, archived
Headers show
Series [v3] drm/i915/lnl: Remove watchdog timers for PSR | expand

Commit Message

Mika Kahola Oct. 10, 2023, 9:52 a.m. UTC
Watchdorg timers for Lunarlake HW were removed for PSR/PSR2
The patch removes the use of these timers from the driver code.

BSpec: 69895

v2: Reword commit message (Ville)
    Drop HPD mask from LNL (Ville)
    Revise masking logic (Jouni)
v3: Revise commit message (Ville)
    Revert HPD mask removal as irrelevant for this patch (Ville)

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

Comments

Hogander, Jouni Oct. 10, 2023, 11:47 a.m. UTC | #1
On Tue, 2023-10-10 at 12:52 +0300, Mika Kahola wrote:
> Watchdorg timers for Lunarlake HW were removed for PSR/PSR2
> The patch removes the use of these timers from the driver code.
> 
> BSpec: 69895
> 
> v2: Reword commit message (Ville)
>     Drop HPD mask from LNL (Ville)
>     Revise masking logic (Jouni)
> v3: Revise commit message (Ville)
>     Revert HPD mask removal as irrelevant for this patch (Ville)
> 
> Signed-off-by: Mika Kahola <mika.kahola@intel.com>

Consider fixing typo above (watchdorg) before merging:

Reviewed-by: Jouni Högander <jouni.hogander@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 10 +++++++---
>  1 file changed, 7 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index bb65881e87cc..4f1f31fc9529 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -676,7 +676,9 @@ static void hsw_activate_psr1(struct intel_dp
> *intel_dp)
>  
>         val |=
> EDP_PSR_IDLE_FRAMES(psr_compute_idle_frames(intel_dp));
>  
> -       val |= EDP_PSR_MAX_SLEEP_TIME(max_sleep_time);
> +       if (DISPLAY_VER(dev_priv) < 20)
> +               val |= EDP_PSR_MAX_SLEEP_TIME(max_sleep_time);
> +
>         if (IS_HASWELL(dev_priv))
>                 val |= EDP_PSR_MIN_LINK_ENTRY_TIME_8_LINES;
>  
> @@ -1400,8 +1402,10 @@ static void intel_psr_enable_source(struct
> intel_dp *intel_dp,
>          */
>         mask = EDP_PSR_DEBUG_MASK_MEMUP |
>                EDP_PSR_DEBUG_MASK_HPD |
> -              EDP_PSR_DEBUG_MASK_LPSP |
> -              EDP_PSR_DEBUG_MASK_MAX_SLEEP;
> +              EDP_PSR_DEBUG_MASK_LPSP;
> +
> +       if (DISPLAY_VER(dev_priv) < 20)
> +               mask |= EDP_PSR_DEBUG_MASK_MAX_SLEEP;
>  
>         /*
>          * No separate pipe reg write mask on hsw/bdw, so have to
> unmask all
Hogander, Jouni Oct. 13, 2023, 9:17 a.m. UTC | #2
On Tue, 2023-10-10 at 11:47 +0000, Hogander, Jouni wrote:
> On Tue, 2023-10-10 at 12:52 +0300, Mika Kahola wrote:
> > Watchdorg timers for Lunarlake HW were removed for PSR/PSR2
> > The patch removes the use of these timers from the driver code.
> > 
> > BSpec: 69895
> > 
> > v2: Reword commit message (Ville)
> >     Drop HPD mask from LNL (Ville)
> >     Revise masking logic (Jouni)
> > v3: Revise commit message (Ville)
> >     Revert HPD mask removal as irrelevant for this patch (Ville)
> > 
> > Signed-off-by: Mika Kahola <mika.kahola@intel.com>
> 
> Consider fixing typo above (watchdorg) before merging:
> 
> Reviewed-by: Jouni Högander <jouni.hogander@intel.com>

Thank you Mika for the patch. This is now merged with typo mentioned
above fixed.

BR,

Jouni Högander

> 
> > ---
> >  drivers/gpu/drm/i915/display/intel_psr.c | 10 +++++++---
> >  1 file changed, 7 insertions(+), 3 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > b/drivers/gpu/drm/i915/display/intel_psr.c
> > index bb65881e87cc..4f1f31fc9529 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -676,7 +676,9 @@ static void hsw_activate_psr1(struct intel_dp
> > *intel_dp)
> >  
> >         val |=
> > EDP_PSR_IDLE_FRAMES(psr_compute_idle_frames(intel_dp));
> >  
> > -       val |= EDP_PSR_MAX_SLEEP_TIME(max_sleep_time);
> > +       if (DISPLAY_VER(dev_priv) < 20)
> > +               val |= EDP_PSR_MAX_SLEEP_TIME(max_sleep_time);
> > +
> >         if (IS_HASWELL(dev_priv))
> >                 val |= EDP_PSR_MIN_LINK_ENTRY_TIME_8_LINES;
> >  
> > @@ -1400,8 +1402,10 @@ static void intel_psr_enable_source(struct
> > intel_dp *intel_dp,
> >          */
> >         mask = EDP_PSR_DEBUG_MASK_MEMUP |
> >                EDP_PSR_DEBUG_MASK_HPD |
> > -              EDP_PSR_DEBUG_MASK_LPSP |
> > -              EDP_PSR_DEBUG_MASK_MAX_SLEEP;
> > +              EDP_PSR_DEBUG_MASK_LPSP;
> > +
> > +       if (DISPLAY_VER(dev_priv) < 20)
> > +               mask |= EDP_PSR_DEBUG_MASK_MAX_SLEEP;
> >  
> >         /*
> >          * No separate pipe reg write mask on hsw/bdw, so have to
> > unmask all
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index bb65881e87cc..4f1f31fc9529 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -676,7 +676,9 @@  static void hsw_activate_psr1(struct intel_dp *intel_dp)
 
 	val |= EDP_PSR_IDLE_FRAMES(psr_compute_idle_frames(intel_dp));
 
-	val |= EDP_PSR_MAX_SLEEP_TIME(max_sleep_time);
+	if (DISPLAY_VER(dev_priv) < 20)
+		val |= EDP_PSR_MAX_SLEEP_TIME(max_sleep_time);
+
 	if (IS_HASWELL(dev_priv))
 		val |= EDP_PSR_MIN_LINK_ENTRY_TIME_8_LINES;
 
@@ -1400,8 +1402,10 @@  static void intel_psr_enable_source(struct intel_dp *intel_dp,
 	 */
 	mask = EDP_PSR_DEBUG_MASK_MEMUP |
 	       EDP_PSR_DEBUG_MASK_HPD |
-	       EDP_PSR_DEBUG_MASK_LPSP |
-	       EDP_PSR_DEBUG_MASK_MAX_SLEEP;
+	       EDP_PSR_DEBUG_MASK_LPSP;
+
+	if (DISPLAY_VER(dev_priv) < 20)
+		mask |= EDP_PSR_DEBUG_MASK_MAX_SLEEP;
 
 	/*
 	 * No separate pipe reg write mask on hsw/bdw, so have to unmask all