| Message ID | 20231013164025.3541606-2-robimarko@gmail.com (mailing list archive) |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | [v3,1/2] dt-bindings: clocks: qcom,gcc-ipq8074: allow QMP PCI PHY PIPE clocks | expand |
On Fri, 13 Oct 2023 at 19:41, Robert Marko <robimarko@gmail.com> wrote: > > Pass QMP PCI PHY PIPE clocks to the GCC controller so it does not have to > find them by matching globaly by name. > > If not passed directly, driver maintains backwards compatibility by then > falling back to global lookup. > > Signed-off-by: Robert Marko <robimarko@gmail.com> > --- > Changes in v2: > * Make clocks and clock-names one-per-line > > arch/arm64/boot/dts/qcom/ipq8074.dtsi | 10 ++++++++-- > 1 file changed, 8 insertions(+), 2 deletions(-) Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi index 38fcb2675b9a..d8e8a5cded64 100644 --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi @@ -579,8 +579,14 @@ qpic_pins: qpic-state { gcc: gcc@1800000 { compatible = "qcom,gcc-ipq8074"; reg = <0x01800000 0x80000>; - clocks = <&xo>, <&sleep_clk>; - clock-names = "xo", "sleep_clk"; + clocks = <&xo>, + <&sleep_clk>, + <&pcie_qmp0>, + <&pcie_qmp1>; + clock-names = "xo", + "sleep_clk", + "pcie0_pipe", + "pcie1_pipe"; #clock-cells = <1>; #power-domain-cells = <1>; #reset-cells = <1>;
Pass QMP PCI PHY PIPE clocks to the GCC controller so it does not have to find them by matching globaly by name. If not passed directly, driver maintains backwards compatibility by then falling back to global lookup. Signed-off-by: Robert Marko <robimarko@gmail.com> --- Changes in v2: * Make clocks and clock-names one-per-line arch/arm64/boot/dts/qcom/ipq8074.dtsi | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-)