| Message ID | 20231016153232.2851095-7-Frank.Li@nxp.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | i3c: master: svc: collection of bugs fixes | expand |
Hi Frank, Frank.Li@nxp.com wrote on Mon, 16 Oct 2023 11:32:32 -0400: > master side report: > silvaco-i3c-master 44330000.i3c-master: Error condition: MSTATUS 0x020090c7, MERRWARN 0x00100000 > > BIT 20: TIMEOUT error > The module has stalled too long in a frame. This happens when: > - The TX FIFO or RX FIFO is not handled and the bus is stuck in the > middle of a message, > - No STOP was issued and between messages, > - IBI manual is used and no decision was made. > The maximum stall period is 10 KHz or 100 μs. > > This is a just warning. System irq thread schedule latency is possible can be bigger > bigger than 100us. Just omit this waring. I'm not sure this is the correct approach. It's a real issue but there is not much we can do about it. Perhaps dev_err is too high, but I would not entirely drop this message. Maybe a comment and turning the message into a dbg printk would be more appropriate? > Fixes: dd3c52846d59 ("i3c: master: svc: Add Silvaco I3C master driver") > Cc: stable@vger.kernel.org > Signed-off-by: Frank Li <Frank.Li@nxp.com> > --- > drivers/i3c/master/svc-i3c-master.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/i3c/master/svc-i3c-master.c b/drivers/i3c/master/svc-i3c-master.c > index 5bca369d6912..18bc277edc8a 100644 > --- a/drivers/i3c/master/svc-i3c-master.c > +++ b/drivers/i3c/master/svc-i3c-master.c > @@ -93,6 +93,7 @@ > #define SVC_I3C_MINTMASKED 0x098 > #define SVC_I3C_MERRWARN 0x09C > #define SVC_I3C_MERRWARN_NACK BIT(2) > +#define SVC_I3C_MERRWARN_TIMEOUT BIT(20) > #define SVC_I3C_MDMACTRL 0x0A0 > #define SVC_I3C_MDATACTRL 0x0AC > #define SVC_I3C_MDATACTRL_FLUSHTB BIT(0) > @@ -225,6 +226,11 @@ static bool svc_i3c_master_error(struct svc_i3c_master *master) > if (SVC_I3C_MSTATUS_ERRWARN(mstatus)) { > merrwarn = readl(master->regs + SVC_I3C_MERRWARN); > writel(merrwarn, master->regs + SVC_I3C_MERRWARN); > + > + /* ignore timeout error */ > + if (merrwarn & SVC_I3C_MERRWARN_TIMEOUT) > + return false; > + > dev_err(master->dev, > "Error condition: MSTATUS 0x%08x, MERRWARN 0x%08x\n", > mstatus, merrwarn); Thanks, Miquèl
On Tue, Oct 17, 2023 at 04:33:35PM +0200, Miquel Raynal wrote: > Hi Frank, > > Frank.Li@nxp.com wrote on Mon, 16 Oct 2023 11:32:32 -0400: > > > master side report: > > silvaco-i3c-master 44330000.i3c-master: Error condition: MSTATUS 0x020090c7, MERRWARN 0x00100000 > > > > BIT 20: TIMEOUT error > > The module has stalled too long in a frame. This happens when: > > - The TX FIFO or RX FIFO is not handled and the bus is stuck in the > > middle of a message, > > - No STOP was issued and between messages, > > - IBI manual is used and no decision was made. > > The maximum stall period is 10 KHz or 100 μs. > > > > This is a just warning. System irq thread schedule latency is possible > > can be bigger > > bigger than 100us. Just omit this waring. > > I'm not sure this is the correct approach. It's a real issue but there > is not much we can do about it. Perhaps dev_err is too high, but I > would not entirely drop this message. Maybe a comment and turning the > message into a dbg printk would be more appropriate? The key is not message. It return true, means IBI/HJ thread will not run. Frank > > > Fixes: dd3c52846d59 ("i3c: master: svc: Add Silvaco I3C master driver") > > Cc: stable@vger.kernel.org > > Signed-off-by: Frank Li <Frank.Li@nxp.com> > > --- > > drivers/i3c/master/svc-i3c-master.c | 6 ++++++ > > 1 file changed, 6 insertions(+) > > > > diff --git a/drivers/i3c/master/svc-i3c-master.c b/drivers/i3c/master/svc-i3c-master.c > > index 5bca369d6912..18bc277edc8a 100644 > > --- a/drivers/i3c/master/svc-i3c-master.c > > +++ b/drivers/i3c/master/svc-i3c-master.c > > @@ -93,6 +93,7 @@ > > #define SVC_I3C_MINTMASKED 0x098 > > #define SVC_I3C_MERRWARN 0x09C > > #define SVC_I3C_MERRWARN_NACK BIT(2) > > +#define SVC_I3C_MERRWARN_TIMEOUT BIT(20) > > #define SVC_I3C_MDMACTRL 0x0A0 > > #define SVC_I3C_MDATACTRL 0x0AC > > #define SVC_I3C_MDATACTRL_FLUSHTB BIT(0) > > @@ -225,6 +226,11 @@ static bool svc_i3c_master_error(struct svc_i3c_master *master) > > if (SVC_I3C_MSTATUS_ERRWARN(mstatus)) { > > merrwarn = readl(master->regs + SVC_I3C_MERRWARN); > > writel(merrwarn, master->regs + SVC_I3C_MERRWARN); > > + > > + /* ignore timeout error */ > > + if (merrwarn & SVC_I3C_MERRWARN_TIMEOUT) > > + return false; > > + > > dev_err(master->dev, > > "Error condition: MSTATUS 0x%08x, MERRWARN 0x%08x\n", > > mstatus, merrwarn); > > > Thanks, > Miquèl
Hi Frank, Frank.li@nxp.com wrote on Tue, 17 Oct 2023 10:45:14 -0400: > On Tue, Oct 17, 2023 at 04:33:35PM +0200, Miquel Raynal wrote: > > Hi Frank, > > > > Frank.Li@nxp.com wrote on Mon, 16 Oct 2023 11:32:32 -0400: > > > > > master side report: > > > silvaco-i3c-master 44330000.i3c-master: Error condition: MSTATUS 0x020090c7, MERRWARN 0x00100000 > > > > > > BIT 20: TIMEOUT error > > > The module has stalled too long in a frame. This happens when: > > > - The TX FIFO or RX FIFO is not handled and the bus is stuck in the > > > middle of a message, > > > - No STOP was issued and between messages, > > > - IBI manual is used and no decision was made. > > > The maximum stall period is 10 KHz or 100 μs. > > > > > > This is a just warning. System irq thread schedule latency is possible > > > > can be bigger > > > bigger than 100us. Just omit this waring. > > > > I'm not sure this is the correct approach. It's a real issue but there > > is not much we can do about it. Perhaps dev_err is too high, but I > > would not entirely drop this message. Maybe a comment and turning the > > message into a dbg printk would be more appropriate? > > The key is not message. It return true, means IBI/HJ thread will not run. But why should the workers run if it's too late? Thanks, Miquèl
On Tue, Oct 17, 2023 at 05:06:03PM +0200, Miquel Raynal wrote: > Hi Frank, > > Frank.li@nxp.com wrote on Tue, 17 Oct 2023 10:45:14 -0400: > > > On Tue, Oct 17, 2023 at 04:33:35PM +0200, Miquel Raynal wrote: > > > Hi Frank, > > > > > > Frank.Li@nxp.com wrote on Mon, 16 Oct 2023 11:32:32 -0400: > > > > > > > master side report: > > > > silvaco-i3c-master 44330000.i3c-master: Error condition: MSTATUS 0x020090c7, MERRWARN 0x00100000 > > > > > > > > BIT 20: TIMEOUT error > > > > The module has stalled too long in a frame. This happens when: > > > > - The TX FIFO or RX FIFO is not handled and the bus is stuck in the > > > > middle of a message, > > > > - No STOP was issued and between messages, > > > > - IBI manual is used and no decision was made. > > > > The maximum stall period is 10 KHz or 100 μs. > > > > > > > > This is a just warning. System irq thread schedule latency is possible > > > > > > can be bigger > > > > bigger than 100us. Just omit this waring. > > > > > > I'm not sure this is the correct approach. It's a real issue but there > > > is not much we can do about it. Perhaps dev_err is too high, but I > > > would not entirely drop this message. Maybe a comment and turning the > > > message into a dbg printk would be more appropriate? > > > > The key is not message. It return true, means IBI/HJ thread will not run. > > But why should the workers run if it's too late? IBI ACK already sent, target think master already accepted IBI. then master driver check TIMEOUT, If without run IBI thread, target's driver will wait target sent IBI. And target wait for driver handle IBI. So the whole system may lock or wait for long time out. Hardware check TIMEOUT and software send ACK is totally async. > > Thanks, > Miquèl
diff --git a/drivers/i3c/master/svc-i3c-master.c b/drivers/i3c/master/svc-i3c-master.c index 5bca369d6912..18bc277edc8a 100644 --- a/drivers/i3c/master/svc-i3c-master.c +++ b/drivers/i3c/master/svc-i3c-master.c @@ -93,6 +93,7 @@ #define SVC_I3C_MINTMASKED 0x098 #define SVC_I3C_MERRWARN 0x09C #define SVC_I3C_MERRWARN_NACK BIT(2) +#define SVC_I3C_MERRWARN_TIMEOUT BIT(20) #define SVC_I3C_MDMACTRL 0x0A0 #define SVC_I3C_MDATACTRL 0x0AC #define SVC_I3C_MDATACTRL_FLUSHTB BIT(0) @@ -225,6 +226,11 @@ static bool svc_i3c_master_error(struct svc_i3c_master *master) if (SVC_I3C_MSTATUS_ERRWARN(mstatus)) { merrwarn = readl(master->regs + SVC_I3C_MERRWARN); writel(merrwarn, master->regs + SVC_I3C_MERRWARN); + + /* ignore timeout error */ + if (merrwarn & SVC_I3C_MERRWARN_TIMEOUT) + return false; + dev_err(master->dev, "Error condition: MSTATUS 0x%08x, MERRWARN 0x%08x\n", mstatus, merrwarn);
master side report: silvaco-i3c-master 44330000.i3c-master: Error condition: MSTATUS 0x020090c7, MERRWARN 0x00100000 BIT 20: TIMEOUT error The module has stalled too long in a frame. This happens when: - The TX FIFO or RX FIFO is not handled and the bus is stuck in the middle of a message, - No STOP was issued and between messages, - IBI manual is used and no decision was made. The maximum stall period is 10 KHz or 100 μs. This is a just warning. System irq thread schedule latency is possible bigger than 100us. Just omit this waring. Fixes: dd3c52846d59 ("i3c: master: svc: Add Silvaco I3C master driver") Cc: stable@vger.kernel.org Signed-off-by: Frank Li <Frank.Li@nxp.com> --- drivers/i3c/master/svc-i3c-master.c | 6 ++++++ 1 file changed, 6 insertions(+)