diff mbox series

[1/4] dt-bindings: cache: sifive,ccache0: Add StarFive JH7100 compatible

Message ID CAJM55Z-vw1sbks0KcHOXMzP-6c9NMg+GOndi2pQ7iyWh0=oQiQ@mail.gmail.com (mailing list archive)
State Changes Requested
Delegated to: Conor Dooley
Headers show
Series [1/4] dt-bindings: cache: sifive,ccache0: Add StarFive JH7100 compatible | expand

Checks

Context Check Description
conchuod/vmtest-fixes-PR fail merge-conflict

Commit Message

Emil Renner Berthing Oct. 25, 2023, 6:56 p.m. UTC
This cache controller is also used on the StarFive JH7100 SoC.
Unfortunately it needs a quirk to work properly, so add dedicated
compatible string to be able to match it.

Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
---
 Documentation/devicetree/bindings/cache/sifive,ccache0.yaml | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

Comments

Conor Dooley Oct. 26, 2023, 1:10 p.m. UTC | #1
On Wed, Oct 25, 2023 at 11:56:37AM -0700, Emil Renner Berthing wrote:
> This cache controller is also used on the StarFive JH7100 SoC.
> Unfortunately it needs a quirk to work properly, so add dedicated
> compatible string to be able to match it.
> 
> Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>

Thanks,
Conor.

> ---
>  Documentation/devicetree/bindings/cache/sifive,ccache0.yaml | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml
> b/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml
> index 8a6a78e1a7ab..7e8cebe21584 100644
> --- a/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml
> +++ b/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml
> @@ -38,7 +38,9 @@ properties:
>                - sifive,fu740-c000-ccache
>            - const: cache
>        - items:
> -          - const: starfive,jh7110-ccache
> +          - enum:
> +              - starfive,jh7100-ccache
> +              - starfive,jh7110-ccache
>            - const: sifive,ccache0
>            - const: cache
>        - items:
> @@ -88,6 +90,7 @@ allOf:
>            contains:
>              enum:
>                - sifive,fu740-c000-ccache
> +              - starfive,jh7100-ccache
>                - starfive,jh7110-ccache
>                - microchip,mpfs-ccache
> 
> @@ -111,6 +114,7 @@ allOf:
>            contains:
>              enum:
>                - sifive,fu740-c000-ccache
> +              - starfive,jh7100-ccache
>                - starfive,jh7110-ccache
> 
>      then:
> -- 
> 2.40.1
Rob Herring (Arm) Oct. 27, 2023, 6:22 p.m. UTC | #2
On Thu, Oct 26, 2023 at 02:10:37PM +0100, Conor Dooley wrote:
> On Wed, Oct 25, 2023 at 11:56:37AM -0700, Emil Renner Berthing wrote:
> > This cache controller is also used on the StarFive JH7100 SoC.
> > Unfortunately it needs a quirk to work properly, so add dedicated
> > compatible string to be able to match it.
> > 
> > Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
> 
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>

Did you want me to pick this up? Or you or Palmer will?

Rob
Conor Dooley Oct. 27, 2023, 6:38 p.m. UTC | #3
On Fri, Oct 27, 2023 at 01:22:36PM -0500, Rob Herring wrote:
> On Thu, Oct 26, 2023 at 02:10:37PM +0100, Conor Dooley wrote:
> > On Wed, Oct 25, 2023 at 11:56:37AM -0700, Emil Renner Berthing wrote:
> > > This cache controller is also used on the StarFive JH7100 SoC.
> > > Unfortunately it needs a quirk to work properly, so add dedicated
> > > compatible string to be able to match it.
> > > 
> > > Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
> > 
> > Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> 
> Did you want me to pick this up? Or you or Palmer will?

Me or Palmer I guess, I was going to take the lot together through soc.

Cheers,
Conor.
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml
b/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml
index 8a6a78e1a7ab..7e8cebe21584 100644
--- a/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml
+++ b/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml
@@ -38,7 +38,9 @@  properties:
               - sifive,fu740-c000-ccache
           - const: cache
       - items:
-          - const: starfive,jh7110-ccache
+          - enum:
+              - starfive,jh7100-ccache
+              - starfive,jh7110-ccache
           - const: sifive,ccache0
           - const: cache
       - items:
@@ -88,6 +90,7 @@  allOf:
           contains:
             enum:
               - sifive,fu740-c000-ccache
+              - starfive,jh7100-ccache
               - starfive,jh7110-ccache
               - microchip,mpfs-ccache

@@ -111,6 +114,7 @@  allOf:
           contains:
             enum:
               - sifive,fu740-c000-ccache
+              - starfive,jh7100-ccache
               - starfive,jh7110-ccache

     then: