| Message ID | 20231125060126.2328690-1-0x1207@gmail.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | e54d628a2721bfbb002c19f6e8ca6746cec7640f |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | [net,v3] net: stmmac: xgmac: Disable FPE MMC interrupts | expand |
On Sat, Nov 25, 2023 at 02:01:26PM +0800, Furong Xu wrote: > Commit aeb18dd07692 ("net: stmmac: xgmac: Disable MMC interrupts > by default") tries to disable MMC interrupts to avoid a storm of > unhandled interrupts, but leaves the FPE(Frame Preemption) MMC > interrupts enabled, FPE MMC interrupts can cause the same problem. > Now we mask FPE TX and RX interrupts to disable all MMC interrupts. > > Fixes: aeb18dd07692 ("net: stmmac: xgmac: Disable MMC interrupts by default") > Reviewed-by: Larysa Zaremba <larysa.zaremba@intel.com> > Signed-off-by: Furong Xu <0x1207@gmail.com> > --- > Changes in v3: > - Update commit message, thanks Larysa. > - Rename register defines, thanks Serge. The fix looking good now. Thanks! Reviewed-by: Serge Semin <fancer.lancer@gmail.com> -Serge(y) > > Changes in v2: > - Update commit message, thanks Wojciech and Andrew. > --- > drivers/net/ethernet/stmicro/stmmac/mmc_core.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/net/ethernet/stmicro/stmmac/mmc_core.c b/drivers/net/ethernet/stmicro/stmmac/mmc_core.c > index ea4910ae0921..6a7c1d325c46 100644 > --- a/drivers/net/ethernet/stmicro/stmmac/mmc_core.c > +++ b/drivers/net/ethernet/stmicro/stmmac/mmc_core.c > @@ -177,8 +177,10 @@ > #define MMC_XGMAC_RX_DISCARD_OCT_GB 0x1b4 > #define MMC_XGMAC_RX_ALIGN_ERR_PKT 0x1bc > > +#define MMC_XGMAC_TX_FPE_INTR_MASK 0x204 > #define MMC_XGMAC_TX_FPE_FRAG 0x208 > #define MMC_XGMAC_TX_HOLD_REQ 0x20c > +#define MMC_XGMAC_RX_FPE_INTR_MASK 0x224 > #define MMC_XGMAC_RX_PKT_ASSEMBLY_ERR 0x228 > #define MMC_XGMAC_RX_PKT_SMD_ERR 0x22c > #define MMC_XGMAC_RX_PKT_ASSEMBLY_OK 0x230 > @@ -352,6 +354,8 @@ static void dwxgmac_mmc_intr_all_mask(void __iomem *mmcaddr) > { > writel(0x0, mmcaddr + MMC_RX_INTR_MASK); > writel(0x0, mmcaddr + MMC_TX_INTR_MASK); > + writel(MMC_DEFAULT_MASK, mmcaddr + MMC_XGMAC_TX_FPE_INTR_MASK); > + writel(MMC_DEFAULT_MASK, mmcaddr + MMC_XGMAC_RX_FPE_INTR_MASK); > writel(MMC_DEFAULT_MASK, mmcaddr + MMC_XGMAC_RX_IPC_INTR_MASK); > } > > -- > 2.34.1 > >
On 25.11.2023 07:01, Furong Xu wrote: > Commit aeb18dd07692 ("net: stmmac: xgmac: Disable MMC interrupts > by default") tries to disable MMC interrupts to avoid a storm of > unhandled interrupts, but leaves the FPE(Frame Preemption) MMC > interrupts enabled, FPE MMC interrupts can cause the same problem. > Now we mask FPE TX and RX interrupts to disable all MMC interrupts. > > Fixes: aeb18dd07692 ("net: stmmac: xgmac: Disable MMC interrupts by default") > Reviewed-by: Larysa Zaremba <larysa.zaremba@intel.com> > Signed-off-by: Furong Xu <0x1207@gmail.com> > --- > Changes in v3: > - Update commit message, thanks Larysa. > - Rename register defines, thanks Serge. > > Changes in v2: > - Update commit message, thanks Wojciech and Andrew. > --- Reviewed-by: Wojciech Drewek <wojciech.drewek@intel.com> > drivers/net/ethernet/stmicro/stmmac/mmc_core.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/net/ethernet/stmicro/stmmac/mmc_core.c b/drivers/net/ethernet/stmicro/stmmac/mmc_core.c > index ea4910ae0921..6a7c1d325c46 100644 > --- a/drivers/net/ethernet/stmicro/stmmac/mmc_core.c > +++ b/drivers/net/ethernet/stmicro/stmmac/mmc_core.c > @@ -177,8 +177,10 @@ > #define MMC_XGMAC_RX_DISCARD_OCT_GB 0x1b4 > #define MMC_XGMAC_RX_ALIGN_ERR_PKT 0x1bc > > +#define MMC_XGMAC_TX_FPE_INTR_MASK 0x204 > #define MMC_XGMAC_TX_FPE_FRAG 0x208 > #define MMC_XGMAC_TX_HOLD_REQ 0x20c > +#define MMC_XGMAC_RX_FPE_INTR_MASK 0x224 > #define MMC_XGMAC_RX_PKT_ASSEMBLY_ERR 0x228 > #define MMC_XGMAC_RX_PKT_SMD_ERR 0x22c > #define MMC_XGMAC_RX_PKT_ASSEMBLY_OK 0x230 > @@ -352,6 +354,8 @@ static void dwxgmac_mmc_intr_all_mask(void __iomem *mmcaddr) > { > writel(0x0, mmcaddr + MMC_RX_INTR_MASK); > writel(0x0, mmcaddr + MMC_TX_INTR_MASK); > + writel(MMC_DEFAULT_MASK, mmcaddr + MMC_XGMAC_TX_FPE_INTR_MASK); > + writel(MMC_DEFAULT_MASK, mmcaddr + MMC_XGMAC_RX_FPE_INTR_MASK); > writel(MMC_DEFAULT_MASK, mmcaddr + MMC_XGMAC_RX_IPC_INTR_MASK); > } >
Hello: This patch was applied to netdev/net.git (main) by Paolo Abeni <pabeni@redhat.com>: On Sat, 25 Nov 2023 14:01:26 +0800 you wrote: > Commit aeb18dd07692 ("net: stmmac: xgmac: Disable MMC interrupts > by default") tries to disable MMC interrupts to avoid a storm of > unhandled interrupts, but leaves the FPE(Frame Preemption) MMC > interrupts enabled, FPE MMC interrupts can cause the same problem. > Now we mask FPE TX and RX interrupts to disable all MMC interrupts. > > Fixes: aeb18dd07692 ("net: stmmac: xgmac: Disable MMC interrupts by default") > Reviewed-by: Larysa Zaremba <larysa.zaremba@intel.com> > Signed-off-by: Furong Xu <0x1207@gmail.com> > > [...] Here is the summary with links: - [net,v3] net: stmmac: xgmac: Disable FPE MMC interrupts https://git.kernel.org/netdev/net/c/e54d628a2721 You are awesome, thank you!
diff --git a/drivers/net/ethernet/stmicro/stmmac/mmc_core.c b/drivers/net/ethernet/stmicro/stmmac/mmc_core.c index ea4910ae0921..6a7c1d325c46 100644 --- a/drivers/net/ethernet/stmicro/stmmac/mmc_core.c +++ b/drivers/net/ethernet/stmicro/stmmac/mmc_core.c @@ -177,8 +177,10 @@ #define MMC_XGMAC_RX_DISCARD_OCT_GB 0x1b4 #define MMC_XGMAC_RX_ALIGN_ERR_PKT 0x1bc +#define MMC_XGMAC_TX_FPE_INTR_MASK 0x204 #define MMC_XGMAC_TX_FPE_FRAG 0x208 #define MMC_XGMAC_TX_HOLD_REQ 0x20c +#define MMC_XGMAC_RX_FPE_INTR_MASK 0x224 #define MMC_XGMAC_RX_PKT_ASSEMBLY_ERR 0x228 #define MMC_XGMAC_RX_PKT_SMD_ERR 0x22c #define MMC_XGMAC_RX_PKT_ASSEMBLY_OK 0x230 @@ -352,6 +354,8 @@ static void dwxgmac_mmc_intr_all_mask(void __iomem *mmcaddr) { writel(0x0, mmcaddr + MMC_RX_INTR_MASK); writel(0x0, mmcaddr + MMC_TX_INTR_MASK); + writel(MMC_DEFAULT_MASK, mmcaddr + MMC_XGMAC_TX_FPE_INTR_MASK); + writel(MMC_DEFAULT_MASK, mmcaddr + MMC_XGMAC_RX_FPE_INTR_MASK); writel(MMC_DEFAULT_MASK, mmcaddr + MMC_XGMAC_RX_IPC_INTR_MASK); }
Commit aeb18dd07692 ("net: stmmac: xgmac: Disable MMC interrupts by default") tries to disable MMC interrupts to avoid a storm of unhandled interrupts, but leaves the FPE(Frame Preemption) MMC interrupts enabled, FPE MMC interrupts can cause the same problem. Now we mask FPE TX and RX interrupts to disable all MMC interrupts. Fixes: aeb18dd07692 ("net: stmmac: xgmac: Disable MMC interrupts by default") Reviewed-by: Larysa Zaremba <larysa.zaremba@intel.com> Signed-off-by: Furong Xu <0x1207@gmail.com> --- Changes in v3: - Update commit message, thanks Larysa. - Rename register defines, thanks Serge. Changes in v2: - Update commit message, thanks Wojciech and Andrew. --- drivers/net/ethernet/stmicro/stmmac/mmc_core.c | 4 ++++ 1 file changed, 4 insertions(+)