| Message ID | 20231127235558.71995-1-gnstark@salutedevices.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v3,1/1] iio: adc: meson: add separate config for axg SoC family | expand |
On Tue, 28 Nov 2023 02:55:58 +0300 George Stark <gnstark@salutedevices.com> wrote: > According to Amlogic custom kernels ADC of axg SoC family has > vref_select and requires this setting to work nominally and thus > needs a separate config. > > Fixes: 90c6241860bf ("iio: adc: meson: init voltage control bits") > Signed-off-by: George Stark <gnstark@salutedevices.com> > Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Applied to the fixes-togreg branch of iio.git and marked for stable. Thanks, jonathan > --- > drivers/iio/adc/meson_saradc.c | 16 +++++++++++++++- > 1 file changed, 15 insertions(+), 1 deletion(-) > > diff --git a/drivers/iio/adc/meson_saradc.c b/drivers/iio/adc/meson_saradc.c > index db280da9edbf..34555a85f131 100644 > --- a/drivers/iio/adc/meson_saradc.c > +++ b/drivers/iio/adc/meson_saradc.c > @@ -1242,6 +1242,20 @@ static const struct meson_sar_adc_param meson_sar_adc_gxl_param = { > .cmv_select = 1, > }; > > +static const struct meson_sar_adc_param meson_sar_adc_axg_param = { > + .has_bl30_integration = true, > + .clock_rate = 1200000, > + .bandgap_reg = MESON_SAR_ADC_REG11, > + .regmap_config = &meson_sar_adc_regmap_config_gxbb, > + .resolution = 12, > + .disable_ring_counter = 1, > + .has_reg11 = true, > + .vref_volatge = 1, > + .has_vref_select = true, > + .vref_select = VREF_VDDA, > + .cmv_select = 1, > +}; > + > static const struct meson_sar_adc_param meson_sar_adc_g12a_param = { > .has_bl30_integration = false, > .clock_rate = 1200000, > @@ -1286,7 +1300,7 @@ static const struct meson_sar_adc_data meson_sar_adc_gxm_data = { > }; > > static const struct meson_sar_adc_data meson_sar_adc_axg_data = { > - .param = &meson_sar_adc_gxl_param, > + .param = &meson_sar_adc_axg_param, > .name = "meson-axg-saradc", > }; >
diff --git a/drivers/iio/adc/meson_saradc.c b/drivers/iio/adc/meson_saradc.c index db280da9edbf..34555a85f131 100644 --- a/drivers/iio/adc/meson_saradc.c +++ b/drivers/iio/adc/meson_saradc.c @@ -1242,6 +1242,20 @@ static const struct meson_sar_adc_param meson_sar_adc_gxl_param = { .cmv_select = 1, }; +static const struct meson_sar_adc_param meson_sar_adc_axg_param = { + .has_bl30_integration = true, + .clock_rate = 1200000, + .bandgap_reg = MESON_SAR_ADC_REG11, + .regmap_config = &meson_sar_adc_regmap_config_gxbb, + .resolution = 12, + .disable_ring_counter = 1, + .has_reg11 = true, + .vref_volatge = 1, + .has_vref_select = true, + .vref_select = VREF_VDDA, + .cmv_select = 1, +}; + static const struct meson_sar_adc_param meson_sar_adc_g12a_param = { .has_bl30_integration = false, .clock_rate = 1200000, @@ -1286,7 +1300,7 @@ static const struct meson_sar_adc_data meson_sar_adc_gxm_data = { }; static const struct meson_sar_adc_data meson_sar_adc_axg_data = { - .param = &meson_sar_adc_gxl_param, + .param = &meson_sar_adc_axg_param, .name = "meson-axg-saradc", };
According to Amlogic custom kernels ADC of axg SoC family has vref_select and requires this setting to work nominally and thus needs a separate config. Fixes: 90c6241860bf ("iio: adc: meson: init voltage control bits") Signed-off-by: George Stark <gnstark@salutedevices.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> --- drivers/iio/adc/meson_saradc.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-)