Message ID | 20231201-x1e80100-drm-panel-edp-v2-1-b0173484631a@linaro.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [v2] drm/panel-edp: Add SDC ATNA45AF01 | expand |
Hi, On Mon, Dec 4, 2023 at 12:54 AM Abel Vesa <abel.vesa@linaro.org> wrote: > > Add support for the SDC ATNA45AF01 panel. > > Signed-off-by: Abel Vesa <abel.vesa@linaro.org> > --- > Changes in v2: > - moved the panel entry in the proper place, as suggested by Doug > - Link to v1: https://lore.kernel.org/r/20231201-x1e80100-drm-panel-edp-v1-1-ef9def711d8a@linaro.org > --- > drivers/gpu/drm/panel/panel-edp.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/gpu/drm/panel/panel-edp.c b/drivers/gpu/drm/panel/panel-edp.c > index 825fa2a0d8a5..78565c99b54d 100644 > --- a/drivers/gpu/drm/panel/panel-edp.c > +++ b/drivers/gpu/drm/panel/panel-edp.c > @@ -1983,6 +1983,8 @@ static const struct edp_panel_entry edp_panels[] = { > EDP_PANEL_ENTRY('K', 'D', 'C', 0x0809, &delay_200_500_e50, "KD116N2930A15"), > EDP_PANEL_ENTRY('K', 'D', 'B', 0x1120, &delay_200_500_e80_d50, "116N29-30NK-C007"), > > + EDP_PANEL_ENTRY('S', 'D', 'C', 0x416d, &delay_100_500_e200, "ATNA45AF01"), > + Looks fine to me now. I will note that e200 is pretty long and I wonder if you've got this because of a requirement of T3+T4+T5+T6+T8 being more than 200ms. If so, I wonder if Pin-yen's patch [1] would help you optimize things? In any case, this looks fine to me. Reviewed-by: Douglas Anderson <dianders@chromium.org> ...I'll wait a day in case you say this would be better atop Pin-yen's patch and want me to wait, but I also have no objections to landing this now and later optimizing the delays. [1] https://crrev.com/c/5052150
Hi, On Mon, Dec 4, 2023 at 8:46 AM Doug Anderson <dianders@chromium.org> wrote: > > Hi, > > On Mon, Dec 4, 2023 at 12:54 AM Abel Vesa <abel.vesa@linaro.org> wrote: > > > > Add support for the SDC ATNA45AF01 panel. > > > > Signed-off-by: Abel Vesa <abel.vesa@linaro.org> > > --- > > Changes in v2: > > - moved the panel entry in the proper place, as suggested by Doug > > - Link to v1: https://lore.kernel.org/r/20231201-x1e80100-drm-panel-edp-v1-1-ef9def711d8a@linaro.org > > --- > > drivers/gpu/drm/panel/panel-edp.c | 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git a/drivers/gpu/drm/panel/panel-edp.c b/drivers/gpu/drm/panel/panel-edp.c > > index 825fa2a0d8a5..78565c99b54d 100644 > > --- a/drivers/gpu/drm/panel/panel-edp.c > > +++ b/drivers/gpu/drm/panel/panel-edp.c > > @@ -1983,6 +1983,8 @@ static const struct edp_panel_entry edp_panels[] = { > > EDP_PANEL_ENTRY('K', 'D', 'C', 0x0809, &delay_200_500_e50, "KD116N2930A15"), > > EDP_PANEL_ENTRY('K', 'D', 'B', 0x1120, &delay_200_500_e80_d50, "116N29-30NK-C007"), > > > > + EDP_PANEL_ENTRY('S', 'D', 'C', 0x416d, &delay_100_500_e200, "ATNA45AF01"), > > + > > Looks fine to me now. I will note that e200 is pretty long and I > wonder if you've got this because of a requirement of T3+T4+T5+T6+T8 > being more than 200ms. If so, I wonder if Pin-yen's patch [1] would > help you optimize things? > > In any case, this looks fine to me. > > Reviewed-by: Douglas Anderson <dianders@chromium.org> > > ...I'll wait a day in case you say this would be better atop Pin-yen's > patch and want me to wait, but I also have no objections to landing > this now and later optimizing the delays. > > [1] https://crrev.com/c/5052150 Pushed to drm-misc-next. 8ebb1fc2e69a drm/panel-edp: Add SDC ATNA45AF01 If you can optimize this after Pin-yen's patch, feel free to send another patch. -Doug
diff --git a/drivers/gpu/drm/panel/panel-edp.c b/drivers/gpu/drm/panel/panel-edp.c index 825fa2a0d8a5..78565c99b54d 100644 --- a/drivers/gpu/drm/panel/panel-edp.c +++ b/drivers/gpu/drm/panel/panel-edp.c @@ -1983,6 +1983,8 @@ static const struct edp_panel_entry edp_panels[] = { EDP_PANEL_ENTRY('K', 'D', 'C', 0x0809, &delay_200_500_e50, "KD116N2930A15"), EDP_PANEL_ENTRY('K', 'D', 'B', 0x1120, &delay_200_500_e80_d50, "116N29-30NK-C007"), + EDP_PANEL_ENTRY('S', 'D', 'C', 0x416d, &delay_100_500_e200, "ATNA45AF01"), + EDP_PANEL_ENTRY('S', 'H', 'P', 0x1511, &delay_200_500_e50, "LQ140M1JW48"), EDP_PANEL_ENTRY('S', 'H', 'P', 0x1523, &sharp_lq140m1jw46.delay, "LQ140M1JW46"), EDP_PANEL_ENTRY('S', 'H', 'P', 0x154c, &delay_200_500_p2e100, "LQ116M1JW10"),
Add support for the SDC ATNA45AF01 panel. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> --- Changes in v2: - moved the panel entry in the proper place, as suggested by Doug - Link to v1: https://lore.kernel.org/r/20231201-x1e80100-drm-panel-edp-v1-1-ef9def711d8a@linaro.org --- drivers/gpu/drm/panel/panel-edp.c | 2 ++ 1 file changed, 2 insertions(+) --- base-commit: 5eda217cee887e595ba2265435862d585d399769 change-id: 20231201-x1e80100-drm-panel-edp-e94dcd8250eb Best regards,