| Message ID | 20231204212304.1736306-1-ggiordano@phytec.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: dts: ti: phycore-am64: Add R5F DMA Region and Mailboxes | expand |
Am 04.12.23 um 22:23 schrieb Garrett Giordano: > Communication between the R5F subsystem and Linux takes place using DMA > memory regions and mailboxes. Here we add DT nodes for the memory > regions and mailboxes to facilitate communication between the R5 > clusters and Linux as remoteproc will fail to start if no memory > regions or mailboxes are provided. > > Fixes: c48ac0efe6d7 ("arm64: dts: ti: Add support for phyBOARD-Electra-AM642") > Signed-off-by: Garrett Giordano <ggiordano@phytec.com> Reviewed-by: Wadim Egorov <w.egorov@phytec.de> > --- > .../boot/dts/ti/k3-am64-phycore-som.dtsi | 102 +++++++++++++++++- > 1 file changed, 101 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi > index 1c2c8f0daca9..37a33006c1fc 100644 > --- a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi > @@ -29,7 +29,7 @@ memory@80000000 { > reg = <0x00000000 0x80000000 0x00000000 0x80000000>; > }; > > - reserved-memory { > + reserved_memory: reserved-memory { > #address-cells = <2>; > #size-cells = <2>; > ranges; > @@ -39,6 +39,54 @@ secure_ddr: optee@9e800000 { > alignment = <0x1000>; > no-map; > }; > + > + main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 { > + compatible = "shared-dma-pool"; > + reg = <0x00 0xa0000000 0x00 0x100000>; > + no-map; > + }; > + > + main_r5fss0_core0_memory_region: r5f-memory@a0100000 { > + compatible = "shared-dma-pool"; > + reg = <0x00 0xa0100000 0x00 0xf00000>; > + no-map; > + }; > + > + main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 { > + compatible = "shared-dma-pool"; > + reg = <0x00 0xa1000000 0x00 0x100000>; > + no-map; > + }; > + > + main_r5fss0_core1_memory_region: r5f-memory@a1100000 { > + compatible = "shared-dma-pool"; > + reg = <0x00 0xa1100000 0x00 0xf00000>; > + no-map; > + }; > + > + main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a2000000 { > + compatible = "shared-dma-pool"; > + reg = <0x00 0xa2000000 0x00 0x100000>; > + no-map; > + }; > + > + main_r5fss1_core0_memory_region: r5f-memory@a2100000 { > + compatible = "shared-dma-pool"; > + reg = <0x00 0xa2100000 0x00 0xf00000>; > + no-map; > + }; > + > + main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a3000000 { > + compatible = "shared-dma-pool"; > + reg = <0x00 0xa3000000 0x00 0x100000>; > + no-map; > + }; > + > + main_r5fss1_core1_memory_region: r5f-memory@a3100000 { > + compatible = "shared-dma-pool"; > + reg = <0x00 0xa3100000 0x00 0xf00000>; > + no-map; > + }; > }; > > leds { > @@ -160,6 +208,34 @@ &cpsw_port2 { > status = "disabled"; > }; > > +&mailbox0_cluster2 { > + status = "okay"; > + > + mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 { > + ti,mbox-rx = <0 0 2>; > + ti,mbox-tx = <1 0 2>; > + }; > + > + mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 { > + ti,mbox-rx = <2 0 2>; > + ti,mbox-tx = <3 0 2>; > + }; > +}; > + > +&mailbox0_cluster4 { > + status = "okay"; > + > + mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 { > + ti,mbox-rx = <0 0 2>; > + ti,mbox-tx = <1 0 2>; > + }; > + > + mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 { > + ti,mbox-rx = <2 0 2>; > + ti,mbox-tx = <3 0 2>; > + }; > +}; > + > &main_i2c0 { > status = "okay"; > pinctrl-names = "default"; > @@ -180,6 +256,30 @@ i2c_som_rtc: rtc@52 { > }; > }; > > +&main_r5fss0_core0 { > + mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>; > + memory-region = <&main_r5fss0_core0_dma_memory_region>, > + <&main_r5fss0_core0_memory_region>; > +}; > + > +&main_r5fss0_core1 { > + mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>; > + memory-region = <&main_r5fss0_core1_dma_memory_region>, > + <&main_r5fss0_core1_memory_region>; > +}; > + > +&main_r5fss1_core0 { > + mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>; > + memory-region = <&main_r5fss1_core0_dma_memory_region>, > + <&main_r5fss1_core0_memory_region>; > +}; > + > +&main_r5fss1_core1 { > + mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>; > + memory-region = <&main_r5fss1_core1_dma_memory_region>, > + <&main_r5fss1_core1_memory_region>; > +}; > + > &ospi0 { > status = "okay"; > pinctrl-names = "default";
Hi Garrett Giordano, On Mon, 04 Dec 2023 13:23:04 -0800, Garrett Giordano wrote: > Communication between the R5F subsystem and Linux takes place using DMA > memory regions and mailboxes. Here we add DT nodes for the memory > regions and mailboxes to facilitate communication between the R5 > clusters and Linux as remoteproc will fail to start if no memory > regions or mailboxes are provided. > > > [...] I have applied the following to branch ti-k3-dts-next on [1]. Thank you! [1/1] arm64: dts: ti: phycore-am64: Add R5F DMA Region and Mailboxes commit: 5709a6809a6869970ef47bbad7451d32e9081ce1 All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent up the chain during the next merge window (or sooner if it is a relevant bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. [1] https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git
diff --git a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi index 1c2c8f0daca9..37a33006c1fc 100644 --- a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi @@ -29,7 +29,7 @@ memory@80000000 { reg = <0x00000000 0x80000000 0x00000000 0x80000000>; }; - reserved-memory { + reserved_memory: reserved-memory { #address-cells = <2>; #size-cells = <2>; ranges; @@ -39,6 +39,54 @@ secure_ddr: optee@9e800000 { alignment = <0x1000>; no-map; }; + + main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 { + compatible = "shared-dma-pool"; + reg = <0x00 0xa0000000 0x00 0x100000>; + no-map; + }; + + main_r5fss0_core0_memory_region: r5f-memory@a0100000 { + compatible = "shared-dma-pool"; + reg = <0x00 0xa0100000 0x00 0xf00000>; + no-map; + }; + + main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 { + compatible = "shared-dma-pool"; + reg = <0x00 0xa1000000 0x00 0x100000>; + no-map; + }; + + main_r5fss0_core1_memory_region: r5f-memory@a1100000 { + compatible = "shared-dma-pool"; + reg = <0x00 0xa1100000 0x00 0xf00000>; + no-map; + }; + + main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a2000000 { + compatible = "shared-dma-pool"; + reg = <0x00 0xa2000000 0x00 0x100000>; + no-map; + }; + + main_r5fss1_core0_memory_region: r5f-memory@a2100000 { + compatible = "shared-dma-pool"; + reg = <0x00 0xa2100000 0x00 0xf00000>; + no-map; + }; + + main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a3000000 { + compatible = "shared-dma-pool"; + reg = <0x00 0xa3000000 0x00 0x100000>; + no-map; + }; + + main_r5fss1_core1_memory_region: r5f-memory@a3100000 { + compatible = "shared-dma-pool"; + reg = <0x00 0xa3100000 0x00 0xf00000>; + no-map; + }; }; leds { @@ -160,6 +208,34 @@ &cpsw_port2 { status = "disabled"; }; +&mailbox0_cluster2 { + status = "okay"; + + mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 { + ti,mbox-rx = <0 0 2>; + ti,mbox-tx = <1 0 2>; + }; + + mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 { + ti,mbox-rx = <2 0 2>; + ti,mbox-tx = <3 0 2>; + }; +}; + +&mailbox0_cluster4 { + status = "okay"; + + mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 { + ti,mbox-rx = <0 0 2>; + ti,mbox-tx = <1 0 2>; + }; + + mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 { + ti,mbox-rx = <2 0 2>; + ti,mbox-tx = <3 0 2>; + }; +}; + &main_i2c0 { status = "okay"; pinctrl-names = "default"; @@ -180,6 +256,30 @@ i2c_som_rtc: rtc@52 { }; }; +&main_r5fss0_core0 { + mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>; + memory-region = <&main_r5fss0_core0_dma_memory_region>, + <&main_r5fss0_core0_memory_region>; +}; + +&main_r5fss0_core1 { + mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>; + memory-region = <&main_r5fss0_core1_dma_memory_region>, + <&main_r5fss0_core1_memory_region>; +}; + +&main_r5fss1_core0 { + mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>; + memory-region = <&main_r5fss1_core0_dma_memory_region>, + <&main_r5fss1_core0_memory_region>; +}; + +&main_r5fss1_core1 { + mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>; + memory-region = <&main_r5fss1_core1_dma_memory_region>, + <&main_r5fss1_core1_memory_region>; +}; + &ospi0 { status = "okay"; pinctrl-names = "default";
Communication between the R5F subsystem and Linux takes place using DMA memory regions and mailboxes. Here we add DT nodes for the memory regions and mailboxes to facilitate communication between the R5 clusters and Linux as remoteproc will fail to start if no memory regions or mailboxes are provided. Fixes: c48ac0efe6d7 ("arm64: dts: ti: Add support for phyBOARD-Electra-AM642") Signed-off-by: Garrett Giordano <ggiordano@phytec.com> --- .../boot/dts/ti/k3-am64-phycore-som.dtsi | 102 +++++++++++++++++- 1 file changed, 101 insertions(+), 1 deletion(-)