Message ID | 20231128175623.121356-4-mwen@igalia.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | drm/amd/display: improve DTN color state log | expand |
On 11/28/23 10:52, Melissa Wen wrote: > Instead of read gamut remap data from hw values, convert HW register > values (S2D13) into a fixed-point 31.32 matrix for color state log. > Change DCN10 log to print data in the format of the gamut remap matrix. > > Signed-off-by: Melissa Wen <mwen@igalia.com> > --- > .../amd/display/dc/hwss/dcn10/dcn10_hwseq.c | 38 +++++++++++++------ > drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h | 3 ++ > 2 files changed, 29 insertions(+), 12 deletions(-) > > diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c > index 9b801488eb9d..f0a9f8818909 100644 > --- a/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c > +++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c > @@ -289,20 +289,26 @@ static void dcn10_log_color_state(struct dc *dc, > struct resource_pool *pool = dc->res_pool; > int i; > > - DTN_INFO("DPP: IGAM format IGAM mode DGAM mode RGAM mode" > - " GAMUT mode C11 C12 C13 C14 C21 C22 C23 C24 " > - "C31 C32 C33 C34\n"); > + DTN_INFO("DPP: IGAM format IGAM mode DGAM mode RGAM mode" > + " GAMUT adjust " > + "C11 C12 C13 C14 " > + "C21 C22 C23 C24 " > + "C31 C32 C33 C34 \n"); > for (i = 0; i < pool->pipe_count; i++) { > struct dpp *dpp = pool->dpps[i]; > struct dcn_dpp_state s = {0}; > > dpp->funcs->dpp_read_state(dpp, &s); > + dpp->funcs->dpp_get_gamut_remap(dpp, &s.gamut_remap); > > if (!s.is_enabled) > continue; > > - DTN_INFO("[%2d]: %11xh %-11s %-11s %-11s" > - "%8x %08xh %08xh %08xh %08xh %08xh %08xh", > + DTN_INFO("[%2d]: %11xh %11s %9s %9s" > + " %12s " > + "%010lld %010lld %010lld %010lld " > + "%010lld %010lld %010lld %010lld " > + "%010lld %010lld %010lld %010lld", > dpp->inst, > s.igam_input_format, > (s.igam_lut_mode == 0) ? "BypassFixed" : > @@ -322,13 +328,21 @@ static void dcn10_log_color_state(struct dc *dc, > ((s.rgam_lut_mode == 3) ? "RAM" : > ((s.rgam_lut_mode == 4) ? "RAM" : > "Unknown")))), > - s.gamut_remap_mode, > - s.gamut_remap_c11_c12, > - s.gamut_remap_c13_c14, > - s.gamut_remap_c21_c22, > - s.gamut_remap_c23_c24, > - s.gamut_remap_c31_c32, > - s.gamut_remap_c33_c34); > + (s.gamut_remap.gamut_adjust_type == 0) ? "Bypass" : > + ((s.gamut_remap.gamut_adjust_type == 1) ? "HW" : > + "SW"), > + s.gamut_remap.temperature_matrix[0].value, > + s.gamut_remap.temperature_matrix[1].value, > + s.gamut_remap.temperature_matrix[2].value, > + s.gamut_remap.temperature_matrix[3].value, > + s.gamut_remap.temperature_matrix[4].value, > + s.gamut_remap.temperature_matrix[5].value, > + s.gamut_remap.temperature_matrix[6].value, > + s.gamut_remap.temperature_matrix[7].value, > + s.gamut_remap.temperature_matrix[8].value, > + s.gamut_remap.temperature_matrix[9].value, > + s.gamut_remap.temperature_matrix[10].value, > + s.gamut_remap.temperature_matrix[11].value); > DTN_INFO("\n"); > } > DTN_INFO("\n"); > diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h b/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h > index 597ebdb4da4c..b6acfd86642a 100644 > --- a/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h > +++ b/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h > @@ -141,6 +141,7 @@ struct dcn_dpp_state { > uint32_t igam_input_format; > uint32_t dgam_lut_mode; > uint32_t rgam_lut_mode; > + // gamut_remap data for dcn10_get_cm_states() > uint32_t gamut_remap_mode; > uint32_t gamut_remap_c11_c12; > uint32_t gamut_remap_c13_c14; > @@ -148,6 +149,8 @@ struct dcn_dpp_state { > uint32_t gamut_remap_c23_c24; > uint32_t gamut_remap_c31_c32; > uint32_t gamut_remap_c33_c34; > + // gamut_remap data for dcn*_log_color_state() > + struct dpp_grph_csc_adjustment gamut_remap; > }; > > struct CM_bias_params { Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c index 9b801488eb9d..f0a9f8818909 100644 --- a/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c @@ -289,20 +289,26 @@ static void dcn10_log_color_state(struct dc *dc, struct resource_pool *pool = dc->res_pool; int i; - DTN_INFO("DPP: IGAM format IGAM mode DGAM mode RGAM mode" - " GAMUT mode C11 C12 C13 C14 C21 C22 C23 C24 " - "C31 C32 C33 C34\n"); + DTN_INFO("DPP: IGAM format IGAM mode DGAM mode RGAM mode" + " GAMUT adjust " + "C11 C12 C13 C14 " + "C21 C22 C23 C24 " + "C31 C32 C33 C34 \n"); for (i = 0; i < pool->pipe_count; i++) { struct dpp *dpp = pool->dpps[i]; struct dcn_dpp_state s = {0}; dpp->funcs->dpp_read_state(dpp, &s); + dpp->funcs->dpp_get_gamut_remap(dpp, &s.gamut_remap); if (!s.is_enabled) continue; - DTN_INFO("[%2d]: %11xh %-11s %-11s %-11s" - "%8x %08xh %08xh %08xh %08xh %08xh %08xh", + DTN_INFO("[%2d]: %11xh %11s %9s %9s" + " %12s " + "%010lld %010lld %010lld %010lld " + "%010lld %010lld %010lld %010lld " + "%010lld %010lld %010lld %010lld", dpp->inst, s.igam_input_format, (s.igam_lut_mode == 0) ? "BypassFixed" : @@ -322,13 +328,21 @@ static void dcn10_log_color_state(struct dc *dc, ((s.rgam_lut_mode == 3) ? "RAM" : ((s.rgam_lut_mode == 4) ? "RAM" : "Unknown")))), - s.gamut_remap_mode, - s.gamut_remap_c11_c12, - s.gamut_remap_c13_c14, - s.gamut_remap_c21_c22, - s.gamut_remap_c23_c24, - s.gamut_remap_c31_c32, - s.gamut_remap_c33_c34); + (s.gamut_remap.gamut_adjust_type == 0) ? "Bypass" : + ((s.gamut_remap.gamut_adjust_type == 1) ? "HW" : + "SW"), + s.gamut_remap.temperature_matrix[0].value, + s.gamut_remap.temperature_matrix[1].value, + s.gamut_remap.temperature_matrix[2].value, + s.gamut_remap.temperature_matrix[3].value, + s.gamut_remap.temperature_matrix[4].value, + s.gamut_remap.temperature_matrix[5].value, + s.gamut_remap.temperature_matrix[6].value, + s.gamut_remap.temperature_matrix[7].value, + s.gamut_remap.temperature_matrix[8].value, + s.gamut_remap.temperature_matrix[9].value, + s.gamut_remap.temperature_matrix[10].value, + s.gamut_remap.temperature_matrix[11].value); DTN_INFO("\n"); } DTN_INFO("\n"); diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h b/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h index 597ebdb4da4c..b6acfd86642a 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h +++ b/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h @@ -141,6 +141,7 @@ struct dcn_dpp_state { uint32_t igam_input_format; uint32_t dgam_lut_mode; uint32_t rgam_lut_mode; + // gamut_remap data for dcn10_get_cm_states() uint32_t gamut_remap_mode; uint32_t gamut_remap_c11_c12; uint32_t gamut_remap_c13_c14; @@ -148,6 +149,8 @@ struct dcn_dpp_state { uint32_t gamut_remap_c23_c24; uint32_t gamut_remap_c31_c32; uint32_t gamut_remap_c33_c34; + // gamut_remap data for dcn*_log_color_state() + struct dpp_grph_csc_adjustment gamut_remap; }; struct CM_bias_params {
Instead of read gamut remap data from hw values, convert HW register values (S2D13) into a fixed-point 31.32 matrix for color state log. Change DCN10 log to print data in the format of the gamut remap matrix. Signed-off-by: Melissa Wen <mwen@igalia.com> --- .../amd/display/dc/hwss/dcn10/dcn10_hwseq.c | 38 +++++++++++++------ drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h | 3 ++ 2 files changed, 29 insertions(+), 12 deletions(-)