| Message ID | 20231201151417.65500-9-manivannan.sadhasivam@linaro.org (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | scsi: ufs: qcom: Minor code cleanups | expand |
On Fri, Dec 01, 2023 at 08:44:12PM +0530, Manivannan Sadhasivam wrote: > If ufs_qcom_power_up_sequence() fails, then it makes no sense to enable > the lane clocks and continue ufshcd_hba_enable(). So let's check the return > value of ufs_qcom_power_up_sequence(). > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Andrew Halaney <ahalaney@redhat.com> > --- > drivers/ufs/host/ufs-qcom.c | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c > index 4948dd732aae..e4dd3777a4d4 100644 > --- a/drivers/ufs/host/ufs-qcom.c > +++ b/drivers/ufs/host/ufs-qcom.c > @@ -415,7 +415,10 @@ static int ufs_qcom_hce_enable_notify(struct ufs_hba *hba, > > switch (status) { > case PRE_CHANGE: > - ufs_qcom_power_up_sequence(hba); > + err = ufs_qcom_power_up_sequence(hba); > + if (err) > + return err; > + > /* > * The PHY PLL output is the source of tx/rx lane symbol > * clocks, hence, enable the lane clocks only after PHY > -- > 2.25.1 > >
On 12/1/2023 8:44 PM, Manivannan Sadhasivam wrote: > If ufs_qcom_power_up_sequence() fails, then it makes no sense to enable > the lane clocks and continue ufshcd_hba_enable(). So let's check the return > value of ufs_qcom_power_up_sequence(). > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- > drivers/ufs/host/ufs-qcom.c | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c > index 4948dd732aae..e4dd3777a4d4 100644 > --- a/drivers/ufs/host/ufs-qcom.c > +++ b/drivers/ufs/host/ufs-qcom.c > @@ -415,7 +415,10 @@ static int ufs_qcom_hce_enable_notify(struct ufs_hba *hba, > > switch (status) { > case PRE_CHANGE: > - ufs_qcom_power_up_sequence(hba); > + err = ufs_qcom_power_up_sequence(hba); > + if (err) > + return err; > + > /* > * The PHY PLL output is the source of tx/rx lane symbol > * clocks, hence, enable the lane clocks only after PHY Reviewed-by: Nitin Rawat <quic_nitirawa@quicinc.com>
diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c index 4948dd732aae..e4dd3777a4d4 100644 --- a/drivers/ufs/host/ufs-qcom.c +++ b/drivers/ufs/host/ufs-qcom.c @@ -415,7 +415,10 @@ static int ufs_qcom_hce_enable_notify(struct ufs_hba *hba, switch (status) { case PRE_CHANGE: - ufs_qcom_power_up_sequence(hba); + err = ufs_qcom_power_up_sequence(hba); + if (err) + return err; + /* * The PHY PLL output is the source of tx/rx lane symbol * clocks, hence, enable the lane clocks only after PHY
If ufs_qcom_power_up_sequence() fails, then it makes no sense to enable the lane clocks and continue ufshcd_hba_enable(). So let's check the return value of ufs_qcom_power_up_sequence(). Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> --- drivers/ufs/host/ufs-qcom.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)