| Message ID | 20231207105508.171162-1-biju.das.jz@bp.renesas.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | Add display/dsi/gpt/poeg clk support | expand |
Hi! > This patch series aims to add display/dsi/gpt/poeg clk support support on > RZ/{G2L,G2LC,V2L} SMARC EVKs. > > All the patches are cherry-picked from the mainline. > > Display is tested with these clock patches. Will send DSI/VSPD > driver/dt patches soon. Series looks good to me. If it passes testing and if there are no other comments, I can apply it. Best regards, Pavel
Hi all, > -----Original Message----- > From: Biju Das <biju.das.jz@bp.renesas.com> > Sent: Thursday, December 7, 2023 7:55 PM > To: cip-dev@lists.cip-project.org; iwamatsu nobuhiro(岩松 信洋 ○ＤＩＴＣ□ > ＤＩＴ○ＯＳＴ) <nobuhiro1.iwamatsu@toshiba.co.jp>; Pavel Machek > <pavel@denx.de> > Cc: Biju Das <biju.das.jz@bp.renesas.com>; Lad Prabhakar > <prabhakar.mahadev-lad.rj@bp.renesas.com> > Subject: [PATCH 5.10.y-cip 00/12] Add display/dsi/gpt/poeg clk support > > This patch series aims to add display/dsi/gpt/poeg clk support support on > RZ/{G2L,G2LC,V2L} SMARC EVKs. > > All the patches are cherry-picked from the mainline. > > Display is tested with these clock patches. Will send DSI/VSPD driver/dt > patches soon. > > This patch series is depend upon [1] > [1] https://patchwork.kernel.org/project/cip-dev/list/?series=807162 > > Biju Das (12): > clk: renesas: rzg2l: Add FOUTPOSTDIV clk support > clk: renesas: rzg2l: Add PLL5_4 clk mux support > clk: renesas: rzg2l: Add DSI divider clk support > clk: renesas: r9a07g044: Add M1 clock support > clk: renesas: r9a07g044: Add {M2, M2_DIV2} Clocks support > clk: renesas: r9a07g044: Add M3 Clock support > clk: renesas: r9a07g044: Add M4 Clock support > clk: renesas: r9a07g044: Add LCDC clock and reset entries > clk: renesas: r9a07g044: Add DSI clock and reset entries > clk: renesas: r9a07g044: Add GPT clock and reset entry > clk: renesas: r9a07g044: Add POEG clock and reset entries > clk: renesas: rzg2l: Fix CPG_SIPLL5_CLK1 register write > I reviewed this series, LGTM. Reviewed-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> Best regards, Nobuhiro
Hi! > > Biju Das (12): > > clk: renesas: rzg2l: Add FOUTPOSTDIV clk support > > clk: renesas: rzg2l: Add PLL5_4 clk mux support > > clk: renesas: rzg2l: Add DSI divider clk support > > clk: renesas: r9a07g044: Add M1 clock support > > clk: renesas: r9a07g044: Add {M2, M2_DIV2} Clocks support > > clk: renesas: r9a07g044: Add M3 Clock support > > clk: renesas: r9a07g044: Add M4 Clock support > > clk: renesas: r9a07g044: Add LCDC clock and reset entries > > clk: renesas: r9a07g044: Add DSI clock and reset entries > > clk: renesas: r9a07g044: Add GPT clock and reset entry > > clk: renesas: r9a07g044: Add POEG clock and reset entries > > clk: renesas: rzg2l: Fix CPG_SIPLL5_CLK1 register write > > > > I reviewed this series, LGTM. > > Reviewed-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> Thank you. Applied and pushed out. Best regards, Pavel
This patch series aims to add display/dsi/gpt/poeg clk support support on RZ/{G2L,G2LC,V2L} SMARC EVKs. All the patches are cherry-picked from the mainline. Display is tested with these clock patches. Will send DSI/VSPD driver/dt patches soon. This patch series is depend upon [1] [1] https://patchwork.kernel.org/project/cip-dev/list/?series=807162 Biju Das (12): clk: renesas: rzg2l: Add FOUTPOSTDIV clk support clk: renesas: rzg2l: Add PLL5_4 clk mux support clk: renesas: rzg2l: Add DSI divider clk support clk: renesas: r9a07g044: Add M1 clock support clk: renesas: r9a07g044: Add {M2, M2_DIV2} Clocks support clk: renesas: r9a07g044: Add M3 Clock support clk: renesas: r9a07g044: Add M4 Clock support clk: renesas: r9a07g044: Add LCDC clock and reset entries clk: renesas: r9a07g044: Add DSI clock and reset entries clk: renesas: r9a07g044: Add GPT clock and reset entry clk: renesas: r9a07g044: Add POEG clock and reset entries clk: renesas: rzg2l: Fix CPG_SIPLL5_CLK1 register write drivers/clk/renesas/r9a07g044-cpg.c | 72 ++++- drivers/clk/renesas/rzg2l-cpg.c | 428 ++++++++++++++++++++++++++++ drivers/clk/renesas/rzg2l-cpg.h | 42 +++ 3 files changed, 540 insertions(+), 2 deletions(-)