| Message ID | 20231213-encoder-fixup-v4-0-6da6cd1bf118@quicinc.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | drm/msm/dpu: INTF CRC configuration cleanups and fix | expand |
On Wed, 13 Dec 2023 13:30:16 -0800, Jessica Zhang wrote: > This series drops the frame_count and enable parameters (as they're always > set to the same value). It also sets input_sel=0x1 for INTF. > Applied, thanks! [1/2] drm/msm/dpu: Set input_sel bit for INTF https://gitlab.freedesktop.org/lumag/msm/-/commit/1b932e07c321 [2/2] drm/msm/dpu: Drop enable and frame_count parameters from dpu_hw_setup_misr() https://gitlab.freedesktop.org/lumag/msm/-/commit/e5c08a41bcf3 Best regards,
This series drops the frame_count and enable parameters (as they're always set to the same value). It also sets input_sel=0x1 for INTF. --- Changes in v4: - Moved comment about input_sel to outside of dpu_hw_setup_misr() - Link to v3: https://lore.kernel.org/r/20231213-encoder-fixup-v3-0-b5cd2cda6bf5@quicinc.com Changes in v3: - Changed input_sel to u8 - Link to v2: https://lore.kernel.org/r/20231213-encoder-fixup-v2-0-b11a4ad35e5e@quicinc.com Changes in v2: - Switched patch order - Changed input_sel parameter from bool to u8 - Link to v1: https://lore.kernel.org/r/20231130-encoder-fixup-v1-0-585c54cd046e@quicinc.com --- Jessica Zhang (2): drm/msm/dpu: Set input_sel bit for INTF drm/msm/dpu: Drop enable and frame_count parameters from dpu_hw_setup_misr() drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 4 ++-- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 4 ++-- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 6 +++--- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h | 4 ++-- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 6 +++--- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h | 3 ++- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c | 20 ++++++++------------ drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h | 8 +++----- 8 files changed, 25 insertions(+), 30 deletions(-) --- base-commit: 0d9372c346d4cdf347354382e0659de8c1cc0236 change-id: 20231122-encoder-fixup-61c190b16085 Best regards,