| Message ID | 20231215190909.3722757-1-emil.renner.berthing@canonical.com (mailing list archive) |
|---|---|
| State | Accepted |
| Headers | show |
| Series | riscv: errata: Make ERRATA_STARFIVE_JH7100 depend on !DMA_DIRECT_REMAP | expand |
From: Conor Dooley <conor.dooley@microchip.com> On Fri, 15 Dec 2023 20:09:09 +0100, Emil Renner Berthing wrote: > Similar to the Renesas RZ/Five[1] the JH7100 SoC needs the non-portable > CONFIG_DMA_GLOBAL_POOL enabled which is incompatible with DMA_DIRECT_REMAP > selected by RISCV_ISA_ZICBOM. > > [1]: commit 31b2daea0764 ("soc: renesas: Make RZ/Five depend on !DMA_DIRECT_REMAP") > > > [...] Applied to riscv-cache-for-next, thanks! [1/1] riscv: errata: Make ERRATA_STARFIVE_JH7100 depend on !DMA_DIRECT_REMAP https://git.kernel.org/conor/c/9a9e8d8d2b6e Thanks, Conor.
diff --git a/arch/riscv/Kconfig.errata b/arch/riscv/Kconfig.errata index 692de149141f..f5c432b005e7 100644 --- a/arch/riscv/Kconfig.errata +++ b/arch/riscv/Kconfig.errata @@ -55,7 +55,9 @@ config ERRATA_SIFIVE_CIP_1200 config ERRATA_STARFIVE_JH7100 bool "StarFive JH7100 support" - depends on ARCH_STARFIVE && NONPORTABLE + depends on ARCH_STARFIVE + depends on !DMA_DIRECT_REMAP + depends on NONPORTABLE select DMA_GLOBAL_POOL select RISCV_DMA_NONCOHERENT select RISCV_NONSTANDARD_CACHE_OPS
Similar to the Renesas RZ/Five[1] the JH7100 SoC needs the non-portable CONFIG_DMA_GLOBAL_POOL enabled which is incompatible with DMA_DIRECT_REMAP selected by RISCV_ISA_ZICBOM. [1]: commit 31b2daea0764 ("soc: renesas: Make RZ/Five depend on !DMA_DIRECT_REMAP") Link: https://lore.kernel.org/all/24942b4d-d16a-463f-b39a-f9dfcb89d742@infradead.org/ Fixes: 64fc984a8a54 ("riscv: errata: Add StarFive JH7100 errata") Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> --- arch/riscv/Kconfig.errata | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)