Message ID | 20231218090543.22353-1-yongxuan.wang@sifive.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [1/1] hw/riscv/virt.c: fix the interrupts-extended property format of PLIC | expand |
On 12/18/23 06:05, Yong-Xuan Wang wrote: > The interrupts-extended property of PLIC only has 2 * hart number > fields when KVM enabled, copy 4 * hart number fields to fdt will > expose some uninitialized value. > > In this patch, I also refactor the code about the setting of > interrupts-extended property of PLIC for improved readability. > > Signed-off-by: Yong-Xuan Wang <yongxuan.wang@sifive.com> > Reviewed-by: Jim Shu <jim.shu@sifive.com> > --- Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> > hw/riscv/virt.c | 47 +++++++++++++++++++++++++++-------------------- > 1 file changed, 27 insertions(+), 20 deletions(-) > > diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c > index d2eac2415619..e42baf82cab6 100644 > --- a/hw/riscv/virt.c > +++ b/hw/riscv/virt.c > @@ -460,24 +460,6 @@ static void create_fdt_socket_plic(RISCVVirtState *s, > "sifive,plic-1.0.0", "riscv,plic0" > }; > > - if (kvm_enabled()) { > - plic_cells = g_new0(uint32_t, s->soc[socket].num_harts * 2); > - } else { > - plic_cells = g_new0(uint32_t, s->soc[socket].num_harts * 4); > - } > - > - for (cpu = 0; cpu < s->soc[socket].num_harts; cpu++) { > - if (kvm_enabled()) { > - plic_cells[cpu * 2 + 0] = cpu_to_be32(intc_phandles[cpu]); > - plic_cells[cpu * 2 + 1] = cpu_to_be32(IRQ_S_EXT); > - } else { > - plic_cells[cpu * 4 + 0] = cpu_to_be32(intc_phandles[cpu]); > - plic_cells[cpu * 4 + 1] = cpu_to_be32(IRQ_M_EXT); > - plic_cells[cpu * 4 + 2] = cpu_to_be32(intc_phandles[cpu]); > - plic_cells[cpu * 4 + 3] = cpu_to_be32(IRQ_S_EXT); > - } > - } > - > plic_phandles[socket] = (*phandle)++; > plic_addr = memmap[VIRT_PLIC].base + (memmap[VIRT_PLIC].size * socket); > plic_name = g_strdup_printf("/soc/plic@%lx", plic_addr); > @@ -490,8 +472,33 @@ static void create_fdt_socket_plic(RISCVVirtState *s, > (char **)&plic_compat, > ARRAY_SIZE(plic_compat)); > qemu_fdt_setprop(ms->fdt, plic_name, "interrupt-controller", NULL, 0); > - qemu_fdt_setprop(ms->fdt, plic_name, "interrupts-extended", > - plic_cells, s->soc[socket].num_harts * sizeof(uint32_t) * 4); > + > + if (kvm_enabled()) { > + plic_cells = g_new0(uint32_t, s->soc[socket].num_harts * 2); > + > + for (cpu = 0; cpu < s->soc[socket].num_harts; cpu++) { > + plic_cells[cpu * 2 + 0] = cpu_to_be32(intc_phandles[cpu]); > + plic_cells[cpu * 2 + 1] = cpu_to_be32(IRQ_S_EXT); > + } > + > + qemu_fdt_setprop(ms->fdt, plic_name, "interrupts-extended", > + plic_cells, > + s->soc[socket].num_harts * sizeof(uint32_t) * 2); > + } else { > + plic_cells = g_new0(uint32_t, s->soc[socket].num_harts * 4); > + > + for (cpu = 0; cpu < s->soc[socket].num_harts; cpu++) { > + plic_cells[cpu * 4 + 0] = cpu_to_be32(intc_phandles[cpu]); > + plic_cells[cpu * 4 + 1] = cpu_to_be32(IRQ_M_EXT); > + plic_cells[cpu * 4 + 2] = cpu_to_be32(intc_phandles[cpu]); > + plic_cells[cpu * 4 + 3] = cpu_to_be32(IRQ_S_EXT); > + } > + > + qemu_fdt_setprop(ms->fdt, plic_name, "interrupts-extended", > + plic_cells, > + s->soc[socket].num_harts * sizeof(uint32_t) * 4); > + } > + > qemu_fdt_setprop_cells(ms->fdt, plic_name, "reg", > 0x0, plic_addr, 0x0, memmap[VIRT_PLIC].size); > qemu_fdt_setprop_cell(ms->fdt, plic_name, "riscv,ndev",
On Mon, Dec 18, 2023 at 7:07 PM Yong-Xuan Wang <yongxuan.wang@sifive.com> wrote: > > The interrupts-extended property of PLIC only has 2 * hart number > fields when KVM enabled, copy 4 * hart number fields to fdt will > expose some uninitialized value. > > In this patch, I also refactor the code about the setting of > interrupts-extended property of PLIC for improved readability. > > Signed-off-by: Yong-Xuan Wang <yongxuan.wang@sifive.com> > Reviewed-by: Jim Shu <jim.shu@sifive.com> Thanks! Applied to riscv-to-apply.next Alistair > --- > hw/riscv/virt.c | 47 +++++++++++++++++++++++++++-------------------- > 1 file changed, 27 insertions(+), 20 deletions(-) > > diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c > index d2eac2415619..e42baf82cab6 100644 > --- a/hw/riscv/virt.c > +++ b/hw/riscv/virt.c > @@ -460,24 +460,6 @@ static void create_fdt_socket_plic(RISCVVirtState *s, > "sifive,plic-1.0.0", "riscv,plic0" > }; > > - if (kvm_enabled()) { > - plic_cells = g_new0(uint32_t, s->soc[socket].num_harts * 2); > - } else { > - plic_cells = g_new0(uint32_t, s->soc[socket].num_harts * 4); > - } > - > - for (cpu = 0; cpu < s->soc[socket].num_harts; cpu++) { > - if (kvm_enabled()) { > - plic_cells[cpu * 2 + 0] = cpu_to_be32(intc_phandles[cpu]); > - plic_cells[cpu * 2 + 1] = cpu_to_be32(IRQ_S_EXT); > - } else { > - plic_cells[cpu * 4 + 0] = cpu_to_be32(intc_phandles[cpu]); > - plic_cells[cpu * 4 + 1] = cpu_to_be32(IRQ_M_EXT); > - plic_cells[cpu * 4 + 2] = cpu_to_be32(intc_phandles[cpu]); > - plic_cells[cpu * 4 + 3] = cpu_to_be32(IRQ_S_EXT); > - } > - } > - > plic_phandles[socket] = (*phandle)++; > plic_addr = memmap[VIRT_PLIC].base + (memmap[VIRT_PLIC].size * socket); > plic_name = g_strdup_printf("/soc/plic@%lx", plic_addr); > @@ -490,8 +472,33 @@ static void create_fdt_socket_plic(RISCVVirtState *s, > (char **)&plic_compat, > ARRAY_SIZE(plic_compat)); > qemu_fdt_setprop(ms->fdt, plic_name, "interrupt-controller", NULL, 0); > - qemu_fdt_setprop(ms->fdt, plic_name, "interrupts-extended", > - plic_cells, s->soc[socket].num_harts * sizeof(uint32_t) * 4); > + > + if (kvm_enabled()) { > + plic_cells = g_new0(uint32_t, s->soc[socket].num_harts * 2); > + > + for (cpu = 0; cpu < s->soc[socket].num_harts; cpu++) { > + plic_cells[cpu * 2 + 0] = cpu_to_be32(intc_phandles[cpu]); > + plic_cells[cpu * 2 + 1] = cpu_to_be32(IRQ_S_EXT); > + } > + > + qemu_fdt_setprop(ms->fdt, plic_name, "interrupts-extended", > + plic_cells, > + s->soc[socket].num_harts * sizeof(uint32_t) * 2); > + } else { > + plic_cells = g_new0(uint32_t, s->soc[socket].num_harts * 4); > + > + for (cpu = 0; cpu < s->soc[socket].num_harts; cpu++) { > + plic_cells[cpu * 4 + 0] = cpu_to_be32(intc_phandles[cpu]); > + plic_cells[cpu * 4 + 1] = cpu_to_be32(IRQ_M_EXT); > + plic_cells[cpu * 4 + 2] = cpu_to_be32(intc_phandles[cpu]); > + plic_cells[cpu * 4 + 3] = cpu_to_be32(IRQ_S_EXT); > + } > + > + qemu_fdt_setprop(ms->fdt, plic_name, "interrupts-extended", > + plic_cells, > + s->soc[socket].num_harts * sizeof(uint32_t) * 4); > + } > + > qemu_fdt_setprop_cells(ms->fdt, plic_name, "reg", > 0x0, plic_addr, 0x0, memmap[VIRT_PLIC].size); > qemu_fdt_setprop_cell(ms->fdt, plic_name, "riscv,ndev", > -- > 2.17.1 > >
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index d2eac2415619..e42baf82cab6 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -460,24 +460,6 @@ static void create_fdt_socket_plic(RISCVVirtState *s, "sifive,plic-1.0.0", "riscv,plic0" }; - if (kvm_enabled()) { - plic_cells = g_new0(uint32_t, s->soc[socket].num_harts * 2); - } else { - plic_cells = g_new0(uint32_t, s->soc[socket].num_harts * 4); - } - - for (cpu = 0; cpu < s->soc[socket].num_harts; cpu++) { - if (kvm_enabled()) { - plic_cells[cpu * 2 + 0] = cpu_to_be32(intc_phandles[cpu]); - plic_cells[cpu * 2 + 1] = cpu_to_be32(IRQ_S_EXT); - } else { - plic_cells[cpu * 4 + 0] = cpu_to_be32(intc_phandles[cpu]); - plic_cells[cpu * 4 + 1] = cpu_to_be32(IRQ_M_EXT); - plic_cells[cpu * 4 + 2] = cpu_to_be32(intc_phandles[cpu]); - plic_cells[cpu * 4 + 3] = cpu_to_be32(IRQ_S_EXT); - } - } - plic_phandles[socket] = (*phandle)++; plic_addr = memmap[VIRT_PLIC].base + (memmap[VIRT_PLIC].size * socket); plic_name = g_strdup_printf("/soc/plic@%lx", plic_addr); @@ -490,8 +472,33 @@ static void create_fdt_socket_plic(RISCVVirtState *s, (char **)&plic_compat, ARRAY_SIZE(plic_compat)); qemu_fdt_setprop(ms->fdt, plic_name, "interrupt-controller", NULL, 0); - qemu_fdt_setprop(ms->fdt, plic_name, "interrupts-extended", - plic_cells, s->soc[socket].num_harts * sizeof(uint32_t) * 4); + + if (kvm_enabled()) { + plic_cells = g_new0(uint32_t, s->soc[socket].num_harts * 2); + + for (cpu = 0; cpu < s->soc[socket].num_harts; cpu++) { + plic_cells[cpu * 2 + 0] = cpu_to_be32(intc_phandles[cpu]); + plic_cells[cpu * 2 + 1] = cpu_to_be32(IRQ_S_EXT); + } + + qemu_fdt_setprop(ms->fdt, plic_name, "interrupts-extended", + plic_cells, + s->soc[socket].num_harts * sizeof(uint32_t) * 2); + } else { + plic_cells = g_new0(uint32_t, s->soc[socket].num_harts * 4); + + for (cpu = 0; cpu < s->soc[socket].num_harts; cpu++) { + plic_cells[cpu * 4 + 0] = cpu_to_be32(intc_phandles[cpu]); + plic_cells[cpu * 4 + 1] = cpu_to_be32(IRQ_M_EXT); + plic_cells[cpu * 4 + 2] = cpu_to_be32(intc_phandles[cpu]); + plic_cells[cpu * 4 + 3] = cpu_to_be32(IRQ_S_EXT); + } + + qemu_fdt_setprop(ms->fdt, plic_name, "interrupts-extended", + plic_cells, + s->soc[socket].num_harts * sizeof(uint32_t) * 4); + } + qemu_fdt_setprop_cells(ms->fdt, plic_name, "reg", 0x0, plic_addr, 0x0, memmap[VIRT_PLIC].size); qemu_fdt_setprop_cell(ms->fdt, plic_name, "riscv,ndev",