| Message ID | 20231221102956.754617-2-c-vankar@ti.com |
|---|---|
| State | RFC |
| Headers | show |
| Series | [RFC,1/2] phy: ti: gmii-sel: Enable SGMII mode for J784S4 | expand |
On 21/12/2023 12:29, Chintan Vankar wrote: > Enable full rate divider configuration support for J784S4_WIZ_10G > for SGMII. > > Signed-off-by: Chintan Vankar <c-vankar@ti.com> Reviewed-by: Roger Quadros <rogerq@kernel.org>
diff --git a/drivers/phy/ti/phy-j721e-wiz.c b/drivers/phy/ti/phy-j721e-wiz.c index fc3cd98c60ff..00d7e6a6de03 100644 --- a/drivers/phy/ti/phy-j721e-wiz.c +++ b/drivers/phy/ti/phy-j721e-wiz.c @@ -1240,6 +1240,7 @@ static int wiz_phy_fullrt_div(struct wiz *wiz, int lane) case J721E_WIZ_10G: case J7200_WIZ_10G: case J721S2_WIZ_10G: + case J784S4_WIZ_10G: if (wiz->lane_phy_type[lane] == PHY_TYPE_SGMII) return regmap_field_write(wiz->p0_fullrt_div[lane], 0x2); break;
Enable full rate divider configuration support for J784S4_WIZ_10G for SGMII. Signed-off-by: Chintan Vankar <c-vankar@ti.com> --- drivers/phy/ti/phy-j721e-wiz.c | 1 + 1 file changed, 1 insertion(+)