Message ID | 20231227173911.3295410-3-liujianfeng1994@gmail.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Add hantro g1 video decoder support for RK3588 | expand |
Hi, Am Mittwoch, 27. Dezember 2023, 18:39:10 CET schrieb Jianfeng Liu: > This patch enables Hantro G1 video decoder in RK3588's > device-tree > > Tested with FFmpeg v4l2_request code taken from [1] > with MPEG2, H.264 and VP8 samples. > > [1] https://github.com/LibreELEC/LibreELEC.tv/blob/master/packages/multimedia/ffmpeg/patches/v4l2-request/ffmpeg-001-v4l2-request.patch > > Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com> > --- > arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 20 ++++++++++++++++++++ > 1 file changed, 20 insertions(+) > > diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > index 5fb0baf8a..b3536e097 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > @@ -708,6 +708,26 @@ vop_mmu: iommu@fdd97e00 { > status = "disabled"; > }; > > + vpu: video-codec@fdb50400 { please sort nodes by bus-address. According to the current rk3588s.dtsi, both nodes should be between - i2c@fd880000 + video-codec@fdb50400 + iommu@fdb50800 - vop@fdd90000 Otherwise this looks nice :-) . Thanks Heiko > + compatible = "rockchip,rk3588-vpu"; > + reg = <0x0 0xfdb50000 0x0 0x800>; > + interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>; > + clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; > + clock-names = "aclk", "hclk"; > + iommus = <&vdpu_mmu>; > + power-domains = <&power RK3588_PD_VDPU>; > + }; > + > + vdpu_mmu: iommu@fdb50800 { > + compatible = "rockchip,rk3588-iommu", "rockchip,rk3568-iommu"; > + reg = <0x0 0xfdb50800 0x0 0x40>; > + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>; > + clock-names = "aclk", "iface"; > + clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; > + power-domains = <&power RK3588_PD_VDPU>; > + #iommu-cells = <0>; > + }; > + > uart0: serial@fd890000 { > compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart"; > reg = <0x0 0xfd890000 0x0 0x100>; > -- > 2.34.1 > > > _______________________________________________ > Linux-rockchip mailing list > Linux-rockchip@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-rockchip >
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index 5fb0baf8a..b3536e097 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -708,6 +708,26 @@ vop_mmu: iommu@fdd97e00 { status = "disabled"; }; + vpu: video-codec@fdb50400 { + compatible = "rockchip,rk3588-vpu"; + reg = <0x0 0xfdb50000 0x0 0x800>; + interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; + clock-names = "aclk", "hclk"; + iommus = <&vdpu_mmu>; + power-domains = <&power RK3588_PD_VDPU>; + }; + + vdpu_mmu: iommu@fdb50800 { + compatible = "rockchip,rk3588-iommu", "rockchip,rk3568-iommu"; + reg = <0x0 0xfdb50800 0x0 0x40>; + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>; + clock-names = "aclk", "iface"; + clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; + power-domains = <&power RK3588_PD_VDPU>; + #iommu-cells = <0>; + }; + uart0: serial@fd890000 { compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart"; reg = <0x0 0xfd890000 0x0 0x100>;
This patch enables Hantro G1 video decoder in RK3588's device-tree Tested with FFmpeg v4l2_request code taken from [1] with MPEG2, H.264 and VP8 samples. [1] https://github.com/LibreELEC/LibreELEC.tv/blob/master/packages/multimedia/ffmpeg/patches/v4l2-request/ffmpeg-001-v4l2-request.patch Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com> --- arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) -- 2.34.1