Message ID | 20231221124339.420119-5-raphael.gallais-pou@foss.st.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Introduce STM32 LVDS driver | expand |
On Thu, 21 Dec 2023 at 14:45, Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com> wrote: > > From: Yannick Fertre <yannick.fertre@foss.st.com> > > The latest hardware version of the LTDC presents the addition of a bus > clock, which contains the global configuration registers and the interrupt > register. > > Signed-off-by: Yannick Fertre <yannick.fertre@foss.st.com> > --- > drivers/gpu/drm/stm/ltdc.c | 8 ++++++++ > drivers/gpu/drm/stm/ltdc.h | 1 + > 2 files changed, 9 insertions(+) I might be missing something, but I don't see this clock being set (compare this patch to the patch 5/8) > > diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c > index 5576fdae4962..67064f47a4cb 100644 > --- a/drivers/gpu/drm/stm/ltdc.c > +++ b/drivers/gpu/drm/stm/ltdc.c > @@ -1896,6 +1896,8 @@ void ltdc_suspend(struct drm_device *ddev) > > DRM_DEBUG_DRIVER("\n"); > clk_disable_unprepare(ldev->pixel_clk); > + if (ldev->bus_clk) > + clk_disable_unprepare(ldev->bus_clk); > } > > int ltdc_resume(struct drm_device *ddev) > @@ -1910,6 +1912,12 @@ int ltdc_resume(struct drm_device *ddev) > DRM_ERROR("failed to enable pixel clock (%d)\n", ret); > return ret; > } > + if (ldev->bus_clk) { > + if (clk_prepare_enable(ldev->bus_clk)) { > + DRM_ERROR("Unable to prepare bus clock\n"); > + return -ENODEV; > + } > + } > > return 0; > } > diff --git a/drivers/gpu/drm/stm/ltdc.h b/drivers/gpu/drm/stm/ltdc.h > index 9d488043ffdb..155d8e4a7c6b 100644 > --- a/drivers/gpu/drm/stm/ltdc.h > +++ b/drivers/gpu/drm/stm/ltdc.h > @@ -44,6 +44,7 @@ struct ltdc_device { > void __iomem *regs; > struct regmap *regmap; > struct clk *pixel_clk; /* lcd pixel clock */ > + struct clk *bus_clk; /* bus clock */ > struct mutex err_lock; /* protecting error_status */ > struct ltdc_caps caps; > u32 irq_status; > -- > 2.25.1 >
On 12/21/23 14:17, Dmitry Baryshkov wrote: > On Thu, 21 Dec 2023 at 14:45, Raphael Gallais-Pou > <raphael.gallais-pou@foss.st.com> wrote: >> From: Yannick Fertre <yannick.fertre@foss.st.com> >> >> The latest hardware version of the LTDC presents the addition of a bus >> clock, which contains the global configuration registers and the interrupt >> register. >> >> Signed-off-by: Yannick Fertre <yannick.fertre@foss.st.com> >> --- >> drivers/gpu/drm/stm/ltdc.c | 8 ++++++++ >> drivers/gpu/drm/stm/ltdc.h | 1 + >> 2 files changed, 9 insertions(+) > I might be missing something, but I don't see this clock being set > (compare this patch to the patch 5/8) Hi Dmitry, This patch needs rework. I'll drop it for now and send it back later when it is more mature. Regards, Raphaƫl > >> diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c >> index 5576fdae4962..67064f47a4cb 100644 >> --- a/drivers/gpu/drm/stm/ltdc.c >> +++ b/drivers/gpu/drm/stm/ltdc.c >> @@ -1896,6 +1896,8 @@ void ltdc_suspend(struct drm_device *ddev) >> >> DRM_DEBUG_DRIVER("\n"); >> clk_disable_unprepare(ldev->pixel_clk); >> + if (ldev->bus_clk) >> + clk_disable_unprepare(ldev->bus_clk); >> } >> >> int ltdc_resume(struct drm_device *ddev) >> @@ -1910,6 +1912,12 @@ int ltdc_resume(struct drm_device *ddev) >> DRM_ERROR("failed to enable pixel clock (%d)\n", ret); >> return ret; >> } >> + if (ldev->bus_clk) { >> + if (clk_prepare_enable(ldev->bus_clk)) { >> + DRM_ERROR("Unable to prepare bus clock\n"); >> + return -ENODEV; >> + } >> + } >> >> return 0; >> } >> diff --git a/drivers/gpu/drm/stm/ltdc.h b/drivers/gpu/drm/stm/ltdc.h >> index 9d488043ffdb..155d8e4a7c6b 100644 >> --- a/drivers/gpu/drm/stm/ltdc.h >> +++ b/drivers/gpu/drm/stm/ltdc.h >> @@ -44,6 +44,7 @@ struct ltdc_device { >> void __iomem *regs; >> struct regmap *regmap; >> struct clk *pixel_clk; /* lcd pixel clock */ >> + struct clk *bus_clk; /* bus clock */ >> struct mutex err_lock; /* protecting error_status */ >> struct ltdc_caps caps; >> u32 irq_status; >> -- >> 2.25.1 >> >
diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c index 5576fdae4962..67064f47a4cb 100644 --- a/drivers/gpu/drm/stm/ltdc.c +++ b/drivers/gpu/drm/stm/ltdc.c @@ -1896,6 +1896,8 @@ void ltdc_suspend(struct drm_device *ddev) DRM_DEBUG_DRIVER("\n"); clk_disable_unprepare(ldev->pixel_clk); + if (ldev->bus_clk) + clk_disable_unprepare(ldev->bus_clk); } int ltdc_resume(struct drm_device *ddev) @@ -1910,6 +1912,12 @@ int ltdc_resume(struct drm_device *ddev) DRM_ERROR("failed to enable pixel clock (%d)\n", ret); return ret; } + if (ldev->bus_clk) { + if (clk_prepare_enable(ldev->bus_clk)) { + DRM_ERROR("Unable to prepare bus clock\n"); + return -ENODEV; + } + } return 0; } diff --git a/drivers/gpu/drm/stm/ltdc.h b/drivers/gpu/drm/stm/ltdc.h index 9d488043ffdb..155d8e4a7c6b 100644 --- a/drivers/gpu/drm/stm/ltdc.h +++ b/drivers/gpu/drm/stm/ltdc.h @@ -44,6 +44,7 @@ struct ltdc_device { void __iomem *regs; struct regmap *regmap; struct clk *pixel_clk; /* lcd pixel clock */ + struct clk *bus_clk; /* bus clock */ struct mutex err_lock; /* protecting error_status */ struct ltdc_caps caps; u32 irq_status;