| Message ID | 20240110073917.2398826-7-peterlin@andestech.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Support Andes PMU extension | expand |
| Context | Check | Description |
|---|---|---|
| conchuod/vmtest-fixes-PR | fail | merge-conflict |
On Tue, Jan 9, 2024 at 11:40 PM Yu Chien Peter Lin <peterlin@andestech.com> wrote: > > The interrupt enable/disable operations are already performed by the > IRQ chip functions riscv_intc_irq_unmask()/riscv_intc_irq_mask() during > enable_percpu_irq()/disable_percpu_irq(). It can be done only once. > > Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> > --- > This patch allows us to drop unnecessary ALT_SBI_PMU_OVF_{DISABLE,ENABLE} > in the initial PATCH3 [1]. > > [1] https://patchwork.kernel.org/project/linux-riscv/patch/20230907021635.1002738-4-peterlin@andestech.com/ > > Changes v1 -> v2: > - New patch > Changes v2 -> v3: > - No change > Changes v3 -> v4: > - No change > Changes v4 -> v5: > - No change > Changes v5 -> v6: > - No change > Changes v6 -> v7: > - No change > --- > drivers/perf/riscv_pmu_sbi.c | 2 -- > 1 file changed, 2 deletions(-) > > diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c > index 16acd4dcdb96..2edbc37abadf 100644 > --- a/drivers/perf/riscv_pmu_sbi.c > +++ b/drivers/perf/riscv_pmu_sbi.c > @@ -781,7 +781,6 @@ static int pmu_sbi_starting_cpu(unsigned int cpu, struct hlist_node *node) > if (riscv_pmu_use_irq) { > cpu_hw_evt->irq = riscv_pmu_irq; > csr_clear(CSR_IP, BIT(riscv_pmu_irq_num)); > - csr_set(CSR_IE, BIT(riscv_pmu_irq_num)); > enable_percpu_irq(riscv_pmu_irq, IRQ_TYPE_NONE); > } > > @@ -792,7 +791,6 @@ static int pmu_sbi_dying_cpu(unsigned int cpu, struct hlist_node *node) > { > if (riscv_pmu_use_irq) { > disable_percpu_irq(riscv_pmu_irq); > - csr_clear(CSR_IE, BIT(riscv_pmu_irq_num)); > } > > /* Disable all counters access for user mode now */ > -- > 2.34.1 > Reviewed-by: Atish Patra <atishp@rivosinc.com>
diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c index 16acd4dcdb96..2edbc37abadf 100644 --- a/drivers/perf/riscv_pmu_sbi.c +++ b/drivers/perf/riscv_pmu_sbi.c @@ -781,7 +781,6 @@ static int pmu_sbi_starting_cpu(unsigned int cpu, struct hlist_node *node) if (riscv_pmu_use_irq) { cpu_hw_evt->irq = riscv_pmu_irq; csr_clear(CSR_IP, BIT(riscv_pmu_irq_num)); - csr_set(CSR_IE, BIT(riscv_pmu_irq_num)); enable_percpu_irq(riscv_pmu_irq, IRQ_TYPE_NONE); } @@ -792,7 +791,6 @@ static int pmu_sbi_dying_cpu(unsigned int cpu, struct hlist_node *node) { if (riscv_pmu_use_irq) { disable_percpu_irq(riscv_pmu_irq); - csr_clear(CSR_IE, BIT(riscv_pmu_irq_num)); } /* Disable all counters access for user mode now */
The interrupt enable/disable operations are already performed by the IRQ chip functions riscv_intc_irq_unmask()/riscv_intc_irq_mask() during enable_percpu_irq()/disable_percpu_irq(). It can be done only once. Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> --- This patch allows us to drop unnecessary ALT_SBI_PMU_OVF_{DISABLE,ENABLE} in the initial PATCH3 [1]. [1] https://patchwork.kernel.org/project/linux-riscv/patch/20230907021635.1002738-4-peterlin@andestech.com/ Changes v1 -> v2: - New patch Changes v2 -> v3: - No change Changes v3 -> v4: - No change Changes v4 -> v5: - No change Changes v5 -> v6: - No change Changes v6 -> v7: - No change --- drivers/perf/riscv_pmu_sbi.c | 2 -- 1 file changed, 2 deletions(-)