| Message ID | 20240109125814.3691033-11-tudor.ambarus@linaro.org (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | e58513b2ff78c70805d3bd7d96bfd76576d4c9e3 |
| Headers | show |
| Series | GS101 Oriole: CMU_PERIC0 support and USI updates | expand |
On Tue, Jan 9, 2024 at 7:01 AM Tudor Ambarus <tudor.ambarus@linaro.org> wrote: > > Get rid of the dummy clock and start using the cmu_peric0 clocks > for the usi_uart and serial_0 nodes. > > Tested the serial at 115200, 1000000 and 3000000 baudrates, > everthing went fine. > > Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> > --- > v3: no change > v2: identify and use gate clocks instead of divider clocks > > arch/arm64/boot/dts/exynos/google/gs101.dtsi | 14 ++++---------- > 1 file changed, 4 insertions(+), 10 deletions(-) > > diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi > index 2d1344a202a9..6aa25cc4676e 100644 > --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi > +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi > @@ -180,14 +180,6 @@ HERA_CPU_SLEEP: cpu-hera-sleep { > }; > }; > > - /* TODO replace with CCF clock */ > - dummy_clk: clock-3 { > - compatible = "fixed-clock"; > - #clock-cells = <0>; > - clock-frequency = <12345>; > - clock-output-names = "pclk"; > - }; > - > /* ect node is required to be present by bootloader */ > ect { > }; > @@ -367,7 +359,8 @@ usi_uart: usi@10a000c0 { > ranges; > #address-cells = <1>; > #size-cells = <1>; > - clocks = <&dummy_clk>, <&dummy_clk>; > + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_CLK_PERIC0_USI0_UART_CLK>, > + <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_0>; That looks much better. Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> > clock-names = "pclk", "ipclk"; > samsung,sysreg = <&sysreg_peric0 0x1020>; > samsung,mode = <USI_V2_UART>; > @@ -378,7 +371,8 @@ serial_0: serial@10a00000 { > reg = <0x10a00000 0xc0>; > interrupts = <GIC_SPI 634 > IRQ_TYPE_LEVEL_HIGH 0>; > - clocks = <&dummy_clk 0>, <&dummy_clk 0>; > + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_CLK_PERIC0_USI0_UART_CLK>, > + <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_0>; > clock-names = "uart", "clk_uart_baud0"; > samsung,uart-fifosize = <256>; > status = "disabled"; > -- > 2.43.0.472.g3155946c3a-goog > >
diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi index 2d1344a202a9..6aa25cc4676e 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi @@ -180,14 +180,6 @@ HERA_CPU_SLEEP: cpu-hera-sleep { }; }; - /* TODO replace with CCF clock */ - dummy_clk: clock-3 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <12345>; - clock-output-names = "pclk"; - }; - /* ect node is required to be present by bootloader */ ect { }; @@ -367,7 +359,8 @@ usi_uart: usi@10a000c0 { ranges; #address-cells = <1>; #size-cells = <1>; - clocks = <&dummy_clk>, <&dummy_clk>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_CLK_PERIC0_USI0_UART_CLK>, + <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_0>; clock-names = "pclk", "ipclk"; samsung,sysreg = <&sysreg_peric0 0x1020>; samsung,mode = <USI_V2_UART>; @@ -378,7 +371,8 @@ serial_0: serial@10a00000 { reg = <0x10a00000 0xc0>; interrupts = <GIC_SPI 634 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&dummy_clk 0>, <&dummy_clk 0>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_CLK_PERIC0_USI0_UART_CLK>, + <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_0>; clock-names = "uart", "clk_uart_baud0"; samsung,uart-fifosize = <256>; status = "disabled";
Get rid of the dummy clock and start using the cmu_peric0 clocks for the usi_uart and serial_0 nodes. Tested the serial at 115200, 1000000 and 3000000 baudrates, everthing went fine. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> --- v3: no change v2: identify and use gate clocks instead of divider clocks arch/arm64/boot/dts/exynos/google/gs101.dtsi | 14 ++++---------- 1 file changed, 4 insertions(+), 10 deletions(-)