Message ID | 20240101182040.28538-1-zajec5@gmail.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [1/2] arm64: dts: mediatek: mt7986: drop "#clock-cells" from PWM | expand |
On 01/01/2024 19:20, Rafał Miłecki wrote: > From: Rafał Miłecki <rafal@milecki.pl> > > PWM is not a clock provider and its binding doesn't specify > "#clock-cells" property. > > This fixes: > arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dtb: pwm@10048000: '#clock-cells' does not match any of the regexes: 'pinctrl-[0-9]+' > from schema $id: http://devicetree.org/schemas/pwm/mediatek,mt2712-pwm.yaml# > > Fixes: eabb04df46c6 ("arm64: dts: mt7986: add PWM") > Cc: Daniel Golle <daniel@makrotopia.org> > Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Both patches applied, thanks! > --- > arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi > index 6caac6ebede4..8a64d1027c46 100644 > --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi > @@ -196,7 +196,6 @@ pio: pinctrl@1001f000 { > pwm: pwm@10048000 { > compatible = "mediatek,mt7986-pwm"; > reg = <0 0x10048000 0 0x1000>; > - #clock-cells = <1>; > #pwm-cells = <2>; > interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&topckgen CLK_TOP_PWM_SEL>,
diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi index 6caac6ebede4..8a64d1027c46 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi @@ -196,7 +196,6 @@ pio: pinctrl@1001f000 { pwm: pwm@10048000 { compatible = "mediatek,mt7986-pwm"; reg = <0 0x10048000 0 0x1000>; - #clock-cells = <1>; #pwm-cells = <2>; interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>; clocks = <&topckgen CLK_TOP_PWM_SEL>,