| Message ID | 20240118121542.748351-2-maobibo@loongson.cn (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | irqchip/loongson-eiointc: Refine irq affinity setting during resume | expand |
Hi, Bibo, On Thu, Jan 18, 2024 at 8:15 PM Bibo Mao <maobibo@loongson.cn> wrote: > > There is one simple optimization in the interrupt dispatch function > eiointc_irq_dispatch. There are 256 IRQs supported for eiointc, eiointc > irq handler reads the bitmap and find pending irqs when irq happens. > So there are four times of consecutive iocsr_read64 operations for the > total 256 bits to find all pending irqs. If the pending bitmap is zero, > it means that there is no pending irq for the this irq bitmap range, > we can skip handling to avoid some useless operations such as clearing > hw ISR. > > Signed-off-by: Bibo Mao <maobibo@loongson.cn> > --- > drivers/irqchip/irq-loongson-eiointc.c | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/drivers/irqchip/irq-loongson-eiointc.c b/drivers/irqchip/irq-loongson-eiointc.c > index 1623cd779175..6143adb1b73b 100644 > --- a/drivers/irqchip/irq-loongson-eiointc.c > +++ b/drivers/irqchip/irq-loongson-eiointc.c > @@ -198,6 +198,17 @@ static void eiointc_irq_dispatch(struct irq_desc *desc) > > for (i = 0; i < eiointc_priv[0]->vec_count / VEC_COUNT_PER_REG; i++) { > pending = iocsr_read64(EIOINTC_REG_ISR + (i << 3)); > + > + /* > + * Get pending eiointc irq from bitmap status, there are 4 times > + * consecutive iocsr_read64 operations for 256 IRQs. > + * > + * Skip handling if pending bitmap is zero This driver is shared by Loongson-2 and Loongson-3 series, for Loongson-2K0500 there is only 128 IRQs, so I suggest only keep the last line "Skip handling if current pending bitmap is zero" is enough. Huacai > + */ > + if (!pending) > + continue; > + > + /* Clear the IRQs */ > iocsr_write64(pending, EIOINTC_REG_ISR + (i << 3)); > while (pending) { > int bit = __ffs(pending); > -- > 2.39.3 >
On 2024/1/24 下午5:51, Huacai Chen wrote: > Hi, Bibo, > > On Thu, Jan 18, 2024 at 8:15 PM Bibo Mao <maobibo@loongson.cn> wrote: >> >> There is one simple optimization in the interrupt dispatch function >> eiointc_irq_dispatch. There are 256 IRQs supported for eiointc, eiointc >> irq handler reads the bitmap and find pending irqs when irq happens. >> So there are four times of consecutive iocsr_read64 operations for the >> total 256 bits to find all pending irqs. If the pending bitmap is zero, >> it means that there is no pending irq for the this irq bitmap range, >> we can skip handling to avoid some useless operations such as clearing >> hw ISR. >> >> Signed-off-by: Bibo Mao <maobibo@loongson.cn> >> --- >> drivers/irqchip/irq-loongson-eiointc.c | 11 +++++++++++ >> 1 file changed, 11 insertions(+) >> >> diff --git a/drivers/irqchip/irq-loongson-eiointc.c b/drivers/irqchip/irq-loongson-eiointc.c >> index 1623cd779175..6143adb1b73b 100644 >> --- a/drivers/irqchip/irq-loongson-eiointc.c >> +++ b/drivers/irqchip/irq-loongson-eiointc.c >> @@ -198,6 +198,17 @@ static void eiointc_irq_dispatch(struct irq_desc *desc) >> >> for (i = 0; i < eiointc_priv[0]->vec_count / VEC_COUNT_PER_REG; i++) { >> pending = iocsr_read64(EIOINTC_REG_ISR + (i << 3)); >> + >> + /* >> + * Get pending eiointc irq from bitmap status, there are 4 times >> + * consecutive iocsr_read64 operations for 256 IRQs. >> + * >> + * Skip handling if pending bitmap is zero > This driver is shared by Loongson-2 and Loongson-3 series, for > Loongson-2K0500 there is only 128 IRQs, so I suggest only keep the > last line "Skip handling if current pending bitmap is zero" is enough. Sure, will refine the patch in this way. Regards Bibo Mao > > Huacai > >> + */ >> + if (!pending) >> + continue; >> + >> + /* Clear the IRQs */ >> iocsr_write64(pending, EIOINTC_REG_ISR + (i << 3)); >> while (pending) { >> int bit = __ffs(pending); >> -- >> 2.39.3 >>
diff --git a/drivers/irqchip/irq-loongson-eiointc.c b/drivers/irqchip/irq-loongson-eiointc.c index 1623cd779175..6143adb1b73b 100644 --- a/drivers/irqchip/irq-loongson-eiointc.c +++ b/drivers/irqchip/irq-loongson-eiointc.c @@ -198,6 +198,17 @@ static void eiointc_irq_dispatch(struct irq_desc *desc) for (i = 0; i < eiointc_priv[0]->vec_count / VEC_COUNT_PER_REG; i++) { pending = iocsr_read64(EIOINTC_REG_ISR + (i << 3)); + + /* + * Get pending eiointc irq from bitmap status, there are 4 times + * consecutive iocsr_read64 operations for 256 IRQs. + * + * Skip handling if pending bitmap is zero + */ + if (!pending) + continue; + + /* Clear the IRQs */ iocsr_write64(pending, EIOINTC_REG_ISR + (i << 3)); while (pending) { int bit = __ffs(pending);
There is one simple optimization in the interrupt dispatch function eiointc_irq_dispatch. There are 256 IRQs supported for eiointc, eiointc irq handler reads the bitmap and find pending irqs when irq happens. So there are four times of consecutive iocsr_read64 operations for the total 256 bits to find all pending irqs. If the pending bitmap is zero, it means that there is no pending irq for the this irq bitmap range, we can skip handling to avoid some useless operations such as clearing hw ISR. Signed-off-by: Bibo Mao <maobibo@loongson.cn> --- drivers/irqchip/irq-loongson-eiointc.c | 11 +++++++++++ 1 file changed, 11 insertions(+)