| Message ID | 20240124085229.1896779-1-luciano.coelho@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915: limit eDP MSO pipe only for display version 20 and below | expand |
Hi, Luca! Quoting Luca Coelho (2024-01-24 05:52:29-03:00) >The pipes that can be used for eDP MSO are limited to pipe A (and >sometimes also pipe B) only for display version 20 and below. > >Modify the function that returns the pipe mask for eDP MSO so that >these limitations only apply to version 20 and below, enabling all >pipes otherwise. > >Bspec: 68923 >Cc: Jani Nikula <jani.nikula@intel.com> >Cc: James Ausmus <james.ausmus@intel.com> >Signed-off-by: Luca Coelho <luciano.coelho@intel.com> >--- > drivers/gpu/drm/i915/display/intel_ddi.c | 9 +++++++-- > 1 file changed, 7 insertions(+), 2 deletions(-) > >diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c >index 922194b957be..5c99ae148213 100644 >--- a/drivers/gpu/drm/i915/display/intel_ddi.c >+++ b/drivers/gpu/drm/i915/display/intel_ddi.c >@@ -2336,13 +2336,18 @@ static void intel_ddi_power_up_lanes(struct intel_encoder *encoder, > } > } > >-/* Splitter enable for eDP MSO is limited to certain pipes. */ >+/* >+ * Splitter enable for eDP MSO is limited to certain pipes, on certain >+ * platforms. >+ */ > static u8 intel_ddi_splitter_pipe_mask(struct drm_i915_private *i915) > { > if (IS_ALDERLAKE_P(i915)) Looks like Xe_LPD+ (MTL's display) and Xe2_LPD (LNL's display) both support both pipes A and B. For Xe_LPD+ we have that info in BSpec 55473 and for Xe2_LPD, in BSpec 68923. So, I think we could: a. OR the condition above with IS_DISPLAY_IP_RANGE(i915, IP_VER(14, 0), IP_VER(20, 0)), and b. And make the "else if" below be about display versions below 14. With those additions, Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> -- Gustavo Sousa > return BIT(PIPE_A) | BIT(PIPE_B); >- else >+ else if (DISPLAY_VER(i915) <= 20) > return BIT(PIPE_A); >+ >+ return ~0; > } > > static void intel_ddi_mso_get_config(struct intel_encoder *encoder, >-- >2.39.2 >
On Wed, 2024-01-24 at 10:22 -0300, Gustavo Sousa wrote: > Hi, Luca! Hi Gustavo! > Quoting Luca Coelho (2024-01-24 05:52:29-03:00) > > The pipes that can be used for eDP MSO are limited to pipe A (and > > sometimes also pipe B) only for display version 20 and below. > > > > Modify the function that returns the pipe mask for eDP MSO so that > > these limitations only apply to version 20 and below, enabling all > > pipes otherwise. > > > > Bspec: 68923 > > Cc: Jani Nikula <jani.nikula@intel.com> > > Cc: James Ausmus <james.ausmus@intel.com> > > Signed-off-by: Luca Coelho <luciano.coelho@intel.com> > > --- > > drivers/gpu/drm/i915/display/intel_ddi.c | 9 +++++++-- > > 1 file changed, 7 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c > > index 922194b957be..5c99ae148213 100644 > > --- a/drivers/gpu/drm/i915/display/intel_ddi.c > > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c > > @@ -2336,13 +2336,18 @@ static void intel_ddi_power_up_lanes(struct intel_encoder *encoder, > > } > > } > > > > -/* Splitter enable for eDP MSO is limited to certain pipes. */ > > +/* > > + * Splitter enable for eDP MSO is limited to certain pipes, on certain > > + * platforms. > > + */ > > static u8 intel_ddi_splitter_pipe_mask(struct drm_i915_private *i915) > > { > > if (IS_ALDERLAKE_P(i915)) > > Looks like Xe_LPD+ (MTL's display) and Xe2_LPD (LNL's display) both support both > pipes A and B. For Xe_LPD+ we have that info in BSpec 55473 and for Xe2_LPD, in > BSpec 68923. So, I think we could: > > a. OR the condition above with IS_DISPLAY_IP_RANGE(i915, IP_VER(14, 0), > IP_VER(20, 0)), and > b. And make the "else if" below be about display versions below 14. Okay, but I guess we have never tested this with MTL and LNL, so can we be sure we won't break anything? In any case, we have bspecs for these, so I'll make the change as you suggested. > With those additions, > > Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Thanks! -- Cheers, Luca.
Quoting Coelho, Luciano (2024-01-26 06:24:29-03:00) >On Wed, 2024-01-24 at 10:22 -0300, Gustavo Sousa wrote: >> Hi, Luca! > >Hi Gustavo! > > >> Quoting Luca Coelho (2024-01-24 05:52:29-03:00) >> > The pipes that can be used for eDP MSO are limited to pipe A (and >> > sometimes also pipe B) only for display version 20 and below. >> > >> > Modify the function that returns the pipe mask for eDP MSO so that >> > these limitations only apply to version 20 and below, enabling all >> > pipes otherwise. >> > >> > Bspec: 68923 >> > Cc: Jani Nikula <jani.nikula@intel.com> >> > Cc: James Ausmus <james.ausmus@intel.com> >> > Signed-off-by: Luca Coelho <luciano.coelho@intel.com> >> > --- >> > drivers/gpu/drm/i915/display/intel_ddi.c | 9 +++++++-- >> > 1 file changed, 7 insertions(+), 2 deletions(-) >> > >> > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c >> > index 922194b957be..5c99ae148213 100644 >> > --- a/drivers/gpu/drm/i915/display/intel_ddi.c >> > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c >> > @@ -2336,13 +2336,18 @@ static void intel_ddi_power_up_lanes(struct intel_encoder *encoder, >> > } >> > } >> > >> > -/* Splitter enable for eDP MSO is limited to certain pipes. */ >> > +/* >> > + * Splitter enable for eDP MSO is limited to certain pipes, on certain >> > + * platforms. >> > + */ >> > static u8 intel_ddi_splitter_pipe_mask(struct drm_i915_private *i915) >> > { >> > if (IS_ALDERLAKE_P(i915)) >> >> Looks like Xe_LPD+ (MTL's display) and Xe2_LPD (LNL's display) both support both >> pipes A and B. For Xe_LPD+ we have that info in BSpec 55473 and for Xe2_LPD, in >> BSpec 68923. So, I think we could: >> >> a. OR the condition above with IS_DISPLAY_IP_RANGE(i915, IP_VER(14, 0), >> IP_VER(20, 0)), and >> b. And make the "else if" below be about display versions below 14. > >Okay, but I guess we have never tested this with MTL and LNL, so can we >be sure we won't break anything? That's a good point. Not sure if we have the required CI infra to verify this. -- Gustavo Sousa > >In any case, we have bspecs for these, so I'll make the change as you >suggested. > >> With those additions, >> >> Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> > >Thanks! > >-- >Cheers, >Luca.
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 922194b957be..5c99ae148213 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -2336,13 +2336,18 @@ static void intel_ddi_power_up_lanes(struct intel_encoder *encoder, } } -/* Splitter enable for eDP MSO is limited to certain pipes. */ +/* + * Splitter enable for eDP MSO is limited to certain pipes, on certain + * platforms. + */ static u8 intel_ddi_splitter_pipe_mask(struct drm_i915_private *i915) { if (IS_ALDERLAKE_P(i915)) return BIT(PIPE_A) | BIT(PIPE_B); - else + else if (DISPLAY_VER(i915) <= 20) return BIT(PIPE_A); + + return ~0; } static void intel_ddi_mso_get_config(struct intel_encoder *encoder,
The pipes that can be used for eDP MSO are limited to pipe A (and sometimes also pipe B) only for display version 20 and below. Modify the function that returns the pipe mask for eDP MSO so that these limitations only apply to version 20 and below, enabling all pipes otherwise. Bspec: 68923 Cc: Jani Nikula <jani.nikula@intel.com> Cc: James Ausmus <james.ausmus@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com> --- drivers/gpu/drm/i915/display/intel_ddi.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-)