Message ID | 20240125113623.2043061-3-maobibo@loongson.cn (mailing list archive) |
---|---|
State | Superseded |
Headers | show |
Series | irqchip/loongson-eiointc: Refine irq affinity setting during resume | expand |
Hi, Bibo, As commented in another patch, you can use eiointc_irq_dispatch(), iocsr_read64() to describe functions, and it is better to use Loongson-3A5000, Loongson-2K2000, Loongson-2K0500 rather than 3A5000, 2K2000, 2K0500. Besides, please always use IRQs rather than IRQS. With these modifications, Acked-by: Huacai Chen <chenhuacai@loongson.cn> On Thu, Jan 25, 2024 at 7:36 PM Bibo Mao <maobibo@loongson.cn> wrote: > > It is one simple optimization in the interrupt dispatch function > eiointc_irq_dispatch. There are 256 IRQs supported for eiointc on > 3A5000 and 2K2000 platform, 128 IRQS on 2K0500 platform, eiointc irq > handler reads the bitmap and find pending irqs when irq happens. So > there are several consecutive iocsr_read64 operations for the all > bits to find all pending irqs. If the pending bitmap is zero, it > means that there is no pending irq for the this irq bitmap range, > we can skip handling to avoid some useless operations such as > clearing hw ISR. > > Signed-off-by: Bibo Mao <maobibo@loongson.cn> > --- > drivers/irqchip/irq-loongson-eiointc.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/irqchip/irq-loongson-eiointc.c b/drivers/irqchip/irq-loongson-eiointc.c > index b3736bdd4b9f..6a71a8c29ac7 100644 > --- a/drivers/irqchip/irq-loongson-eiointc.c > +++ b/drivers/irqchip/irq-loongson-eiointc.c > @@ -198,6 +198,12 @@ static void eiointc_irq_dispatch(struct irq_desc *desc) > > for (i = 0; i < eiointc_priv[0]->vec_count / VEC_COUNT_PER_REG; i++) { > pending = iocsr_read64(EIOINTC_REG_ISR + (i << 3)); > + > + /* Skip handling if pending bitmap is zero */ > + if (!pending) > + continue; > + > + /* Clear the IRQs */ > iocsr_write64(pending, EIOINTC_REG_ISR + (i << 3)); > while (pending) { > int bit = __ffs(pending); > -- > 2.39.3 >
On 2024/1/29 下午8:27, Huacai Chen wrote: > Hi, Bibo, > > As commented in another patch, you can use eiointc_irq_dispatch(), > iocsr_read64() to describe functions, and it is better to use > Loongson-3A5000, Loongson-2K2000, Loongson-2K0500 rather than 3A5000, > 2K2000, 2K0500. Besides, please always use IRQs rather than IRQS. Huacai, Thanks for reviewing. Will do in next patch. Regards Bibo Mao > > With these modifications, > > Acked-by: Huacai Chen <chenhuacai@loongson.cn> > > On Thu, Jan 25, 2024 at 7:36 PM Bibo Mao <maobibo@loongson.cn> wrote: >> >> It is one simple optimization in the interrupt dispatch function >> eiointc_irq_dispatch. There are 256 IRQs supported for eiointc on >> 3A5000 and 2K2000 platform, 128 IRQS on 2K0500 platform, eiointc irq >> handler reads the bitmap and find pending irqs when irq happens. So >> there are several consecutive iocsr_read64 operations for the all >> bits to find all pending irqs. If the pending bitmap is zero, it >> means that there is no pending irq for the this irq bitmap range, >> we can skip handling to avoid some useless operations such as >> clearing hw ISR. >> >> Signed-off-by: Bibo Mao <maobibo@loongson.cn> >> --- >> drivers/irqchip/irq-loongson-eiointc.c | 6 ++++++ >> 1 file changed, 6 insertions(+) >> >> diff --git a/drivers/irqchip/irq-loongson-eiointc.c b/drivers/irqchip/irq-loongson-eiointc.c >> index b3736bdd4b9f..6a71a8c29ac7 100644 >> --- a/drivers/irqchip/irq-loongson-eiointc.c >> +++ b/drivers/irqchip/irq-loongson-eiointc.c >> @@ -198,6 +198,12 @@ static void eiointc_irq_dispatch(struct irq_desc *desc) >> >> for (i = 0; i < eiointc_priv[0]->vec_count / VEC_COUNT_PER_REG; i++) { >> pending = iocsr_read64(EIOINTC_REG_ISR + (i << 3)); >> + >> + /* Skip handling if pending bitmap is zero */ >> + if (!pending) >> + continue; >> + >> + /* Clear the IRQs */ >> iocsr_write64(pending, EIOINTC_REG_ISR + (i << 3)); >> while (pending) { >> int bit = __ffs(pending); >> -- >> 2.39.3 >>
diff --git a/drivers/irqchip/irq-loongson-eiointc.c b/drivers/irqchip/irq-loongson-eiointc.c index b3736bdd4b9f..6a71a8c29ac7 100644 --- a/drivers/irqchip/irq-loongson-eiointc.c +++ b/drivers/irqchip/irq-loongson-eiointc.c @@ -198,6 +198,12 @@ static void eiointc_irq_dispatch(struct irq_desc *desc) for (i = 0; i < eiointc_priv[0]->vec_count / VEC_COUNT_PER_REG; i++) { pending = iocsr_read64(EIOINTC_REG_ISR + (i << 3)); + + /* Skip handling if pending bitmap is zero */ + if (!pending) + continue; + + /* Clear the IRQs */ iocsr_write64(pending, EIOINTC_REG_ISR + (i << 3)); while (pending) { int bit = __ffs(pending);
It is one simple optimization in the interrupt dispatch function eiointc_irq_dispatch. There are 256 IRQs supported for eiointc on 3A5000 and 2K2000 platform, 128 IRQS on 2K0500 platform, eiointc irq handler reads the bitmap and find pending irqs when irq happens. So there are several consecutive iocsr_read64 operations for the all bits to find all pending irqs. If the pending bitmap is zero, it means that there is no pending irq for the this irq bitmap range, we can skip handling to avoid some useless operations such as clearing hw ISR. Signed-off-by: Bibo Mao <maobibo@loongson.cn> --- drivers/irqchip/irq-loongson-eiointc.c | 6 ++++++ 1 file changed, 6 insertions(+)