diff mbox series

[3/3] fpga: xilinx-selectmap: add new driver

Message ID 20240129225602.3832449-3-charles.perry@savoirfairelinux.com (mailing list archive)
State New
Headers show
Series [1/3] fpga: xilinx-spi: extract a common driver core | expand

Commit Message

Charles Perry Jan. 29, 2024, 10:56 p.m. UTC 
Xilinx 7 series FPGA can be programmed using a slave parallel port named
the SelectMAP interface in the datasheet. This slave interface is
compatible with the i.MX6 EIM bus controller but other types of external
memory mapped parallel bus might work.

xilinx-selectmap currently only supports the x8 mode where data is loaded
at one byte per rising edge of the clock, with the MSb of each byte
presented to the D0 pin.

The following DT fragment shows a valid configuration on a custom i.MX6
board (pinctrl not shown for readability):

&weim {
    status = "okay";
    ranges = <0 0 0x08000000 0x04000000>;

    fpga_mgr: fpga_programmer@0,0 {
        compatible = "xlnx,fpga-slave-selectmap";
        reg = <0 0 0x4000000>;
        fsl,weim-cs-timing = <0x00070031 0x00000142
                              0x00020000 0x00000000
                              0x0c000645 0x00000000>;
        prog_b-gpios = <&gpio5 5 GPIO_ACTIVE_LOW>;
        init-b-gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
        done-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>;
        csi-b-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
        rdwr-b-gpios = <&gpio3 10 GPIO_ACTIVE_LOW>;
    };
};

Signed-off-by: Charles Perry <charles.perry@savoirfairelinux.com>
---
 drivers/fpga/Kconfig            |   8 +++
 drivers/fpga/Makefile           |   1 +
 drivers/fpga/xilinx-selectmap.c | 100 ++++++++++++++++++++++++++++++++
 3 files changed, 109 insertions(+)
 create mode 100644 drivers/fpga/xilinx-selectmap.c

Comments

Krzysztof Kozlowski Jan. 30, 2024, 7:56 a.m. UTC | #1 
On 29/01/2024 23:56, Charles Perry wrote:
> Xilinx 7 series FPGA can be programmed using a slave parallel port named
> the SelectMAP interface in the datasheet. This slave interface is
> compatible with the i.MX6 EIM bus controller but other types of external
> memory mapped parallel bus might work.
> 
> xilinx-selectmap currently only supports the x8 mode where data is loaded
> at one byte per rising edge of the clock, with the MSb of each byte
> presented to the D0 pin.
> 
> The following DT fragment shows a valid configuration on a custom i.MX6
> board (pinctrl not shown for readability):
> 
> &weim {
>     status = "okay";
>     ranges = <0 0 0x08000000 0x04000000>;
> 
>     fpga_mgr: fpga_programmer@0,0 {
>         compatible = "xlnx,fpga-slave-selectmap";
>         reg = <0 0 0x4000000>;
>         fsl,weim-cs-timing = <0x00070031 0x00000142
>                               0x00020000 0x00000000
>                               0x0c000645 0x00000000>;
>         prog_b-gpios = <&gpio5 5 GPIO_ACTIVE_LOW>;
>         init-b-gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
>         done-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>;
>         csi-b-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
>         rdwr-b-gpios = <&gpio3 10 GPIO_ACTIVE_LOW>;
>     };
> };

Drop that example. First, it is not correct. Second, a correct one in
bindings is enough.

> 
> Signed-off-by: Charles Perry <charles.perry@savoirfairelinux.com>
> ---

...

> +static int xilinx_selectmap_probe(struct platform_device *pdev)
> +{
> +	struct xilinx_selectmap_conf *conf;
> +	struct resource *r;
> +	void __iomem *base;
> +
> +	conf = devm_kzalloc(&pdev->dev, sizeof(*conf), GFP_KERNEL);
> +	if (!conf)
> +		return -ENOMEM;
> +
> +	base = devm_platform_get_and_ioremap_resource(pdev, 0, &r);
> +	if (IS_ERR(base))
> +		return dev_err_probe(&pdev->dev, PTR_ERR(base), "ioremap error\n");
> +	conf->base = base;
> +
> +	/* CSI_B is active low */
> +	conf->csi_b = devm_gpiod_get_optional(&pdev->dev, "csi-b", GPIOD_OUT_HIGH);
> +	if (IS_ERR(conf->csi_b))
> +		return dev_err_probe(&pdev->dev, PTR_ERR(conf->csi_b),
> +				     "Failed to get CSI_B gpio\n");
> +
> +	/* RDWR_B is active low */
> +	conf->rdwr_b = devm_gpiod_get_optional(&pdev->dev, "rdwr-b", GPIOD_OUT_HIGH);
> +	if (IS_ERR(conf->rdwr_b))
> +		return dev_err_probe(&pdev->dev, PTR_ERR(conf->rdwr_b),
> +				     "Failed to get RDWR_B gpio\n");
> +
> +	return xilinx_core_probe(&conf->core, &pdev->dev,
> +							xilinx_selectmap_write,
> +							xilinx_selectmap_apply_padding);

Totally messed indentation. Please run scripts/checkpatch.pl and fix
reported warnings. Some warnings can be ignored, but the code here looks
like it needs a fix. Feel free to get in touch if the warning is not clear.

> +}
> +
> +static const struct of_device_id xlnx_selectmap_of_match[] = {
> +		{ .compatible = "xlnx,fpga-slave-selectmap", },
> +		{}
> +};
> +MODULE_DEVICE_TABLE(of, xlnx_selectmap_of_match);
> +
> +static struct platform_driver xilinx_slave_selectmap_driver = {
> +	.driver = {
> +		.name = "xilinx-slave-selectmap",
> +		.of_match_table = of_match_ptr(xlnx_selectmap_of_match),

Drop of_match_ptr, it leads to warnings.

> +	},
> +	.probe  = xilinx_selectmap_probe,
> +};

Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index d27a1ebf40838..37b35f58f0dfb 100644
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -67,6 +67,14 @@  config FPGA_MGR_STRATIX10_SOC
 config FPGA_MGR_XILINX_CORE
 	tristate
 
+config FPGA_MGR_XILINX_SELECTMAP
+	tristate "Xilinx Configuration over SelectMAP"
+	depends on HAS_IOMEM
+	select FPGA_MGR_XILINX_CORE
+	help
+	  FPGA manager driver support for Xilinx FPGA configuration
+	  over SelectMAP interface.
+
 config FPGA_MGR_XILINX_SPI
 	tristate "Xilinx Configuration over Slave Serial (SPI)"
 	depends on SPI
diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile
index 7ec795b6a5a70..aeb89bb13517e 100644
--- a/drivers/fpga/Makefile
+++ b/drivers/fpga/Makefile
@@ -16,6 +16,7 @@  obj-$(CONFIG_FPGA_MGR_SOCFPGA_A10)	+= socfpga-a10.o
 obj-$(CONFIG_FPGA_MGR_STRATIX10_SOC)	+= stratix10-soc.o
 obj-$(CONFIG_FPGA_MGR_TS73XX)		+= ts73xx-fpga.o
 obj-$(CONFIG_FPGA_MGR_XILINX_CORE)	+= xilinx-core.o
+obj-$(CONFIG_FPGA_MGR_XILINX_SELECTMAP)	+= xilinx-selectmap.o
 obj-$(CONFIG_FPGA_MGR_XILINX_SPI)	+= xilinx-spi.o
 obj-$(CONFIG_FPGA_MGR_ZYNQ_FPGA)	+= zynq-fpga.o
 obj-$(CONFIG_FPGA_MGR_ZYNQMP_FPGA)	+= zynqmp-fpga.o
diff --git a/drivers/fpga/xilinx-selectmap.c b/drivers/fpga/xilinx-selectmap.c
new file mode 100644
index 0000000000000..e9e522e9952bb
--- /dev/null
+++ b/drivers/fpga/xilinx-selectmap.c
@@ -0,0 +1,100 @@ 
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Xilinx Spartan6 and 7 Series Slave SelectMAP Driver
+ *
+ * (C) 2024 Charles Perry <charles.perry@savoirfairelinux.com>
+ *
+ * Manage Xilinx FPGA firmware loaded over the SelectMAP configuration
+ * interface.
+ */
+
+#include "xilinx-core.h"
+
+#include <linux/platform_device.h>
+#include <linux/gpio/consumer.h>
+#include <linux/module.h>
+#include <linux/mod_devicetable.h>
+#include <linux/of.h>
+#include <linux/io.h>
+
+struct xilinx_selectmap_conf {
+	struct xilinx_fpga_core core;
+	void __iomem *base;
+	struct gpio_desc *csi_b;
+	struct gpio_desc *rdwr_b;
+};
+
+#define to_xilinx_selectmap_conf(obj) \
+	container_of(obj, struct xilinx_selectmap_conf, core)
+
+static int xilinx_selectmap_write(struct xilinx_fpga_core *core, const char *buf,
+			    size_t count)
+{
+	struct xilinx_selectmap_conf *conf = to_xilinx_selectmap_conf(core);
+	u32 i;
+
+	for (i = 0; i < count; ++i)
+		writeb(buf[i], conf->base);
+
+	return 0;
+}
+
+static int xilinx_selectmap_apply_padding(struct xilinx_fpga_core *core)
+{
+	struct xilinx_selectmap_conf *conf = to_xilinx_selectmap_conf(core);
+
+	writeb(0xFF, conf->base);
+	return 0;
+}
+
+static int xilinx_selectmap_probe(struct platform_device *pdev)
+{
+	struct xilinx_selectmap_conf *conf;
+	struct resource *r;
+	void __iomem *base;
+
+	conf = devm_kzalloc(&pdev->dev, sizeof(*conf), GFP_KERNEL);
+	if (!conf)
+		return -ENOMEM;
+
+	base = devm_platform_get_and_ioremap_resource(pdev, 0, &r);
+	if (IS_ERR(base))
+		return dev_err_probe(&pdev->dev, PTR_ERR(base), "ioremap error\n");
+	conf->base = base;
+
+	/* CSI_B is active low */
+	conf->csi_b = devm_gpiod_get_optional(&pdev->dev, "csi-b", GPIOD_OUT_HIGH);
+	if (IS_ERR(conf->csi_b))
+		return dev_err_probe(&pdev->dev, PTR_ERR(conf->csi_b),
+				     "Failed to get CSI_B gpio\n");
+
+	/* RDWR_B is active low */
+	conf->rdwr_b = devm_gpiod_get_optional(&pdev->dev, "rdwr-b", GPIOD_OUT_HIGH);
+	if (IS_ERR(conf->rdwr_b))
+		return dev_err_probe(&pdev->dev, PTR_ERR(conf->rdwr_b),
+				     "Failed to get RDWR_B gpio\n");
+
+	return xilinx_core_probe(&conf->core, &pdev->dev,
+							xilinx_selectmap_write,
+							xilinx_selectmap_apply_padding);
+}
+
+static const struct of_device_id xlnx_selectmap_of_match[] = {
+		{ .compatible = "xlnx,fpga-slave-selectmap", },
+		{}
+};
+MODULE_DEVICE_TABLE(of, xlnx_selectmap_of_match);
+
+static struct platform_driver xilinx_slave_selectmap_driver = {
+	.driver = {
+		.name = "xilinx-slave-selectmap",
+		.of_match_table = of_match_ptr(xlnx_selectmap_of_match),
+	},
+	.probe  = xilinx_selectmap_probe,
+};
+
+module_platform_driver(xilinx_slave_selectmap_driver);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Charles Perry <charles.perry@savoirfairelinux.com>");
+MODULE_DESCRIPTION("Load Xilinx FPGA firmware over SelectMap");