| Message ID | 20231221153528.1588049-1-Frank.Li@nxp.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | dmaengine: fsl-edma: integrate TCD64 support for 64bit physical address | expand |
On Thu, Dec 21, 2023 at 10:35:22AM -0500, Frank Li wrote: > Change from v3 to v4. > Fixed tcd64 type as fsl_edma_hw_tcd64 > > Change from v2 to v3: > - fix sparse build warning > > Change from v1 to v2: > - fixed mcf-edma-main.c build error. > - fixed readq build error. readq actually is not atomic read in imx95. > So split to two ioread32\iowrite32. > It needs read at least twice to avoid lower 32 bit part wrap during read > up 32bit part. > > first 2 patch is prepare, No function change. > 3rd patch is dt-bind doc > 4rd patch is actuall support TCD64 @vnod: Could you please check these patches? I still have more patches, which depended on this. eDMA is used for cross whole i.MX chips. Frank > > Frank Li (6): > dmaengine: fsl-edma: involve help macro fsl_edma_set(get)_tcd() > dmaengine: fsl-edma: fix spare build warning > dmaengine: fsl-edma: add address for channel mux register in > fsl_edma_chan > dmaengine: mcf-edma: utilize edma_write_tcdreg() macro for TCD Access > dt-bindings: fsl-dma: fsl-edma: add fsl,imx95-edma5 compatible string > dmaengine: fsl-edma: integrate TCD64 support for i.MX95 > > .../devicetree/bindings/dma/fsl,edma.yaml | 2 + > drivers/dma/fsl-edma-common.c | 101 ++++++----- > drivers/dma/fsl-edma-common.h | 161 ++++++++++++++++-- > drivers/dma/fsl-edma-main.c | 19 ++- > drivers/dma/mcf-edma-main.c | 2 +- > 5 files changed, 223 insertions(+), 62 deletions(-) > > -- > 2.34.1 >
On Mon, Jan 22, 2024 at 11:55:26AM -0500, Frank Li wrote: > On Thu, Dec 21, 2023 at 10:35:22AM -0500, Frank Li wrote: > > Change from v3 to v4. > > Fixed tcd64 type as fsl_edma_hw_tcd64 > > > > Change from v2 to v3: > > - fix sparse build warning > > > > Change from v1 to v2: > > - fixed mcf-edma-main.c build error. > > - fixed readq build error. readq actually is not atomic read in imx95. > > So split to two ioread32\iowrite32. > > It needs read at least twice to avoid lower 32 bit part wrap during read > > up 32bit part. > > > > first 2 patch is prepare, No function change. > > 3rd patch is dt-bind doc > > 4rd patch is actuall support TCD64 > > @vnod: > > Could you please check these patches? I still have more patches, > which depended on this. > eDMA is used for cross whole i.MX chips. > > Frank @Vinod: Ping? Frank > > > > > Frank Li (6): > > dmaengine: fsl-edma: involve help macro fsl_edma_set(get)_tcd() > > dmaengine: fsl-edma: fix spare build warning > > dmaengine: fsl-edma: add address for channel mux register in > > fsl_edma_chan > > dmaengine: mcf-edma: utilize edma_write_tcdreg() macro for TCD Access > > dt-bindings: fsl-dma: fsl-edma: add fsl,imx95-edma5 compatible string > > dmaengine: fsl-edma: integrate TCD64 support for i.MX95 > > > > .../devicetree/bindings/dma/fsl,edma.yaml | 2 + > > drivers/dma/fsl-edma-common.c | 101 ++++++----- > > drivers/dma/fsl-edma-common.h | 161 ++++++++++++++++-- > > drivers/dma/fsl-edma-main.c | 19 ++- > > drivers/dma/mcf-edma-main.c | 2 +- > > 5 files changed, 223 insertions(+), 62 deletions(-) > > > > -- > > 2.34.1 > >
On Thu, 21 Dec 2023 10:35:22 -0500, Frank Li wrote: > Change from v3 to v4. > Fixed tcd64 type as fsl_edma_hw_tcd64 > > Change from v2 to v3: > - fix sparse build warning > > Change from v1 to v2: > - fixed mcf-edma-main.c build error. > - fixed readq build error. readq actually is not atomic read in imx95. > So split to two ioread32\iowrite32. > It needs read at least twice to avoid lower 32 bit part wrap during read > up 32bit part. > > [...] Applied, thanks! [1/6] dmaengine: fsl-edma: involve help macro fsl_edma_set(get)_tcd() commit: 5dc604455dcf20bdca639bf6b8ea2ea60d39c022 [2/6] dmaengine: fsl-edma: fix spare build warning commit: 537df9ab2d72bb782926a7d263a9f0a101e60b2e [3/6] dmaengine: fsl-edma: add address for channel mux register in fsl_edma_chan commit: e0a08ed25492b6437e366b347113db484037b9b9 [4/6] dmaengine: mcf-edma: utilize edma_write_tcdreg() macro for TCD Access commit: b51dd7c8aac292396d038d0a9fb9c1589addb515 [5/6] dt-bindings: fsl-dma: fsl-edma: add fsl,imx95-edma5 compatible string commit: b7b8715b430ee4431bd675687c5bcda113e7ddd4 [6/6] dmaengine: fsl-edma: integrate TCD64 support for i.MX95 commit: de7d9cb3b064fdfb2e0e7706d14ffee20b762ad2 Best regards,
Change from v3 to v4. Fixed tcd64 type as fsl_edma_hw_tcd64 Change from v2 to v3: - fix sparse build warning Change from v1 to v2: - fixed mcf-edma-main.c build error. - fixed readq build error. readq actually is not atomic read in imx95. So split to two ioread32\iowrite32. It needs read at least twice to avoid lower 32 bit part wrap during read up 32bit part. first 2 patch is prepare, No function change. 3rd patch is dt-bind doc 4rd patch is actuall support TCD64 Frank Li (6): dmaengine: fsl-edma: involve help macro fsl_edma_set(get)_tcd() dmaengine: fsl-edma: fix spare build warning dmaengine: fsl-edma: add address for channel mux register in fsl_edma_chan dmaengine: mcf-edma: utilize edma_write_tcdreg() macro for TCD Access dt-bindings: fsl-dma: fsl-edma: add fsl,imx95-edma5 compatible string dmaengine: fsl-edma: integrate TCD64 support for i.MX95 .../devicetree/bindings/dma/fsl,edma.yaml | 2 + drivers/dma/fsl-edma-common.c | 101 ++++++----- drivers/dma/fsl-edma-common.h | 161 ++++++++++++++++-- drivers/dma/fsl-edma-main.c | 19 ++- drivers/dma/mcf-edma-main.c | 2 +- 5 files changed, 223 insertions(+), 62 deletions(-)