| Message ID | 20240131003714.2779593-7-jm@ti.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add tuning algorithm for delay chain | expand |
On 18:37-20240130, Judith Mendez wrote: > From: Nitin Yadav <n-yadav@ti.com> > > Add sdhci0 DT node in k3-am62a-main for eMMC support. Add otap/itap > values according to the datasheet[0], Refer to Table 7-79. > > [0] https://www.ti.com/lit/ds/symlink/am62a3.pdf > > Signed-off-by: Judith Mendez <jm@ti.com> > Signed-off-by: Nitin Yadav <n-yadav@ti.com> > --- Side note: will appreciate if the dt patches come via the SoC dt tree for TI K3 and not via mmc tree. > arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi > index f0b8c9ab1459..523dee78123a 100644 > --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi > @@ -536,6 +536,24 @@ main_gpio1: gpio@601000 { > status = "disabled"; > }; > > + sdhci0: mmc@fa10000 { > + compatible = "ti,am62-sdhci"; > + reg = <0x00 0xfa10000 0x00 0x260>, <0x00 0xfa18000 0x00 0x134>; > + interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; > + power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>; > + clocks = <&k3_clks 57 5>, <&k3_clks 57 6>; > + clock-names = "clk_ahb", "clk_xin"; > + assigned-clocks = <&k3_clks 57 6>; > + assigned-clock-parents = <&k3_clks 57 8>; > + bus-width = <8>; > + mmc-hs200-1_8v; > + ti,clkbuf-sel = <0x7>; > + ti,otap-del-sel-legacy = <0x0>; > + ti,otap-del-sel-mmc-hs = <0x0>; > + ti,otap-del-sel-hs200 = <0x6>; > + status = "disabled"; > + }; > + > sdhci1: mmc@fa00000 { > compatible = "ti,am62-sdhci"; > reg = <0x00 0xfa00000 0x00 0x260>, <0x00 0xfa08000 0x00 0x134>; > -- > 2.34.1 >
On 1/31/24 1:17 PM, Nishanth Menon wrote: > On 18:37-20240130, Judith Mendez wrote: >> From: Nitin Yadav <n-yadav@ti.com> >> >> Add sdhci0 DT node in k3-am62a-main for eMMC support. Add otap/itap >> values according to the datasheet[0], Refer to Table 7-79. >> >> [0] https://www.ti.com/lit/ds/symlink/am62a3.pdf >> >> Signed-off-by: Judith Mendez <jm@ti.com> >> Signed-off-by: Nitin Yadav <n-yadav@ti.com> >> --- > > Side note: will appreciate if the dt patches come via the SoC dt tree > for TI K3 and not via mmc tree. Will use DO NOT MERGE for v1, thanks. > >> arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 18 ++++++++++++++++++ >> 1 file changed, 18 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi >> index f0b8c9ab1459..523dee78123a 100644 >> --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi >> +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi >> @@ -536,6 +536,24 @@ main_gpio1: gpio@601000 { >> status = "disabled"; >> }; >> >> + sdhci0: mmc@fa10000 { >> + compatible = "ti,am62-sdhci"; >> + reg = <0x00 0xfa10000 0x00 0x260>, <0x00 0xfa18000 0x00 0x134>; >> + interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; >> + power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>; >> + clocks = <&k3_clks 57 5>, <&k3_clks 57 6>; >> + clock-names = "clk_ahb", "clk_xin"; >> + assigned-clocks = <&k3_clks 57 6>; >> + assigned-clock-parents = <&k3_clks 57 8>; >> + bus-width = <8>; >> + mmc-hs200-1_8v; >> + ti,clkbuf-sel = <0x7>; >> + ti,otap-del-sel-legacy = <0x0>; >> + ti,otap-del-sel-mmc-hs = <0x0>; >> + ti,otap-del-sel-hs200 = <0x6>; >> + status = "disabled"; >> + }; >> + >> sdhci1: mmc@fa00000 { >> compatible = "ti,am62-sdhci"; >> reg = <0x00 0xfa00000 0x00 0x260>, <0x00 0xfa08000 0x00 0x134>; >> -- >> 2.34.1 >> >
diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi index f0b8c9ab1459..523dee78123a 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi @@ -536,6 +536,24 @@ main_gpio1: gpio@601000 { status = "disabled"; }; + sdhci0: mmc@fa10000 { + compatible = "ti,am62-sdhci"; + reg = <0x00 0xfa10000 0x00 0x260>, <0x00 0xfa18000 0x00 0x134>; + interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 57 5>, <&k3_clks 57 6>; + clock-names = "clk_ahb", "clk_xin"; + assigned-clocks = <&k3_clks 57 6>; + assigned-clock-parents = <&k3_clks 57 8>; + bus-width = <8>; + mmc-hs200-1_8v; + ti,clkbuf-sel = <0x7>; + ti,otap-del-sel-legacy = <0x0>; + ti,otap-del-sel-mmc-hs = <0x0>; + ti,otap-del-sel-hs200 = <0x6>; + status = "disabled"; + }; + sdhci1: mmc@fa00000 { compatible = "ti,am62-sdhci"; reg = <0x00 0xfa00000 0x00 0x260>, <0x00 0xfa08000 0x00 0x134>;