| Message ID | 20240104133013.2911035-1-sjakhade@cadence.com |
|---|---|
| Headers | show |
| Series | PHY: Add support for dual refclk configurations in Cadence Torrent PHY driver | expand |
Hi Vinod, > -----Original Message----- > From: Swapnil Jakhade <sjakhade@cadence.com> > Sent: Thursday, January 4, 2024 7:00 PM > To: vkoul@kernel.org; kishon@kernel.org; robh+dt@kernel.org; > krzysztof.kozlowski+dt@linaro.org; conor+dt@kernel.org; linux- > phy@lists.infradead.org; linux-kernel@vger.kernel.org; > devicetree@vger.kernel.org > Cc: Milind Parab <mparab@cadence.com>; Swapnil Kashinath Jakhade > <sjakhade@cadence.com>; rogerq@kernel.org; s-vadapalli@ti.com > Subject: [PATCH v4 0/5] PHY: Add support for dual refclk configurations in > Cadence Torrent PHY driver > > This patch series extends Torrent PHY driver functionality to support dual input > reference clocks. > > It also adds support for following multilink configurations: > - PCIe(100MHz) + USXGMII(156.25MHz) > - USXGMII(156.25MHz) + SGMII/QSGMII(100MHz) > > The changes have been validated on TI J721E and J7200 platforms. > > v1 of the patch series can be found at [1]. > > Version History: > > v4: > - Fixed error handling in patch 2/5 as per review comments for v3 > - Added Acked-by and Reviewed-by tags > > v3: > - Updated clock description in DT documentation > - Added Acked-by from Conor > > v2: > - Rename refclk1 to pll1_refclk in bindings and in driver > - Simplify clock-names as suggested by Rob > > [1] https://lore.kernel.org/linux-phy/20230724150002.5645-1- > sjakhade@cadence.com/ > > Swapnil Jakhade (5): > dt-bindings: phy: cadence-torrent: Add optional input reference clock > for PLL1 > phy: cadence-torrent: Add PCIe(100MHz) + USXGMII(156.25MHz) multilink > configuration > phy: cadence-torrent: Add USXGMII(156.25MHz) + SGMII/QSGMII(100MHz) > multilink configuration > dt-bindings: phy: cadence-torrent: Add a separate compatible for TI > J7200 > phy: cadence-torrent: Add USXGMII(156.25MHz) + SGMII/QSGMII(100MHz) > multilink config for TI J7200 > > .../bindings/phy/phy-cadence-torrent.yaml | 11 +- > drivers/phy/cadence/phy-cadence-torrent.c | 720 +++++++++++++++++- > 2 files changed, 719 insertions(+), 12 deletions(-) > > -- Could you please consider reviewing and merging this series? Thanks & regards, Swapnil > 2.25.1
On Thu, 04 Jan 2024 14:30:08 +0100, Swapnil Jakhade wrote: > This patch series extends Torrent PHY driver functionality to support > dual input reference clocks. > > It also adds support for following multilink configurations: > - PCIe(100MHz) + USXGMII(156.25MHz) > - USXGMII(156.25MHz) + SGMII/QSGMII(100MHz) > > [...] Applied, thanks! [1/5] dt-bindings: phy: cadence-torrent: Add optional input reference clock for PLL1 commit: 8499d84894faa8e83f2aa2b064ad9c81296db162 [2/5] phy: cadence-torrent: Add PCIe(100MHz) + USXGMII(156.25MHz) multilink configuration commit: 8163ae426c8a4a0cbffd7fd81711892679d5a416 [3/5] phy: cadence-torrent: Add USXGMII(156.25MHz) + SGMII/QSGMII(100MHz) multilink configuration commit: 8c827d87ed3f77d1fcb0b43f1ff25550f187fb5c [4/5] dt-bindings: phy: cadence-torrent: Add a separate compatible for TI J7200 commit: 97f5aea36c593bd9ab4b735c8a3632fe5782ed88 [5/5] phy: cadence-torrent: Add USXGMII(156.25MHz) + SGMII/QSGMII(100MHz) multilink config for TI J7200 commit: 39fbf1074264d33d66effdce5e5a887a28de13ec Best regards,
This patch series extends Torrent PHY driver functionality to support dual input reference clocks. It also adds support for following multilink configurations: - PCIe(100MHz) + USXGMII(156.25MHz) - USXGMII(156.25MHz) + SGMII/QSGMII(100MHz) The changes have been validated on TI J721E and J7200 platforms. v1 of the patch series can be found at [1]. Version History: v4: - Fixed error handling in patch 2/5 as per review comments for v3 - Added Acked-by and Reviewed-by tags v3: - Updated clock description in DT documentation - Added Acked-by from Conor v2: - Rename refclk1 to pll1_refclk in bindings and in driver - Simplify clock-names as suggested by Rob [1] https://lore.kernel.org/linux-phy/20230724150002.5645-1-sjakhade@cadence.com/ Swapnil Jakhade (5): dt-bindings: phy: cadence-torrent: Add optional input reference clock for PLL1 phy: cadence-torrent: Add PCIe(100MHz) + USXGMII(156.25MHz) multilink configuration phy: cadence-torrent: Add USXGMII(156.25MHz) + SGMII/QSGMII(100MHz) multilink configuration dt-bindings: phy: cadence-torrent: Add a separate compatible for TI J7200 phy: cadence-torrent: Add USXGMII(156.25MHz) + SGMII/QSGMII(100MHz) multilink config for TI J7200 .../bindings/phy/phy-cadence-torrent.yaml | 11 +- drivers/phy/cadence/phy-cadence-torrent.c | 720 +++++++++++++++++- 2 files changed, 719 insertions(+), 12 deletions(-)