| Message ID | 20240203-topic-8550_ufs_oppv2-v2-1-b0bef2a73e6c@linaro.org (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 2f7be4caacd264b23f637f2e1d7dccf4f1e4f20e |
| Headers | show |
| Series | [v2] arm64: dts: qcom: sm8550: Switch UFS from opp-table-hz to opp-v2 | expand |
On 03/02/2024 01:10, Konrad Dybcio wrote: > Now that the non-legacy form of OPP is supported within the UFS driver, > go ahead and switch to it, adding support for more intermediate freq/power > states. > > Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> > --- > Extracted out of: > https://lore.kernel.org/linux-arm-msm/15d2bd66-29f3-435b-8494-d82ec4036413@linaro.org/#t > > Changes since v1: > - Set the reference clock rate to 0 in opp entries, it doesn't support > ratesetting anyway. Confirmed UFS still works. > --- > arch/arm64/boot/dts/qcom/sm8550.dtsi | 50 +++++++++++++++++++++++++++++------- > 1 file changed, 41 insertions(+), 9 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi > index c89d8f3dad21..144e20edf237 100644 > --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi > @@ -1966,6 +1966,7 @@ ufs_mem_hc: ufs@1d84000 { > iommus = <&apps_smmu 0x60 0x0>; > dma-coherent; > > + operating-points-v2 = <&ufs_opp_table>; > interconnects = <&aggre1_noc MASTER_UFS_MEM 0 &mc_virt SLAVE_EBI1 0>, > <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_UFS_MEM_CFG 0>; > > @@ -1986,18 +1987,49 @@ ufs_mem_hc: ufs@1d84000 { > <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, > <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, > <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; > - freq-table-hz = > - <75000000 300000000>, > - <0 0>, > - <0 0>, > - <75000000 300000000>, > - <100000000 403000000>, > - <0 0>, > - <0 0>, > - <0 0>; > qcom,ice = <&ice>; > > status = "disabled"; > + > + ufs_opp_table: opp-table { > + compatible = "operating-points-v2"; > + > + opp-75000000 { > + opp-hz = /bits/ 64 <75000000>, > + /bits/ 64 <0>, > + /bits/ 64 <0>, > + /bits/ 64 <75000000>, > + /bits/ 64 <0>, > + /bits/ 64 <0>, > + /bits/ 64 <0>, > + /bits/ 64 <0>; > + required-opps = <&rpmhpd_opp_low_svs>; > + }; > + > + opp-150000000 { > + opp-hz = /bits/ 64 <150000000>, > + /bits/ 64 <0>, > + /bits/ 64 <0>, > + /bits/ 64 <150000000>, > + /bits/ 64 <0>, > + /bits/ 64 <0>, > + /bits/ 64 <0>, > + /bits/ 64 <0>; > + required-opps = <&rpmhpd_opp_svs>; > + }; > + > + opp-300000000 { > + opp-hz = /bits/ 64 <300000000>, > + /bits/ 64 <0>, > + /bits/ 64 <0>, > + /bits/ 64 <300000000>, > + /bits/ 64 <0>, > + /bits/ 64 <0>, > + /bits/ 64 <0>, > + /bits/ 64 <0>; > + required-opps = <&rpmhpd_opp_nom>; > + }; > + }; > }; > > ice: crypto@1d88000 { > > --- > base-commit: 076d56d74f17e625b3d63cf4743b3d7d02180379 > change-id: 20240203-topic-8550_ufs_oppv2-bb88d63a4c58 > > Best regards, Looks fine: Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Let me have a test run with it first before applying. Neil
On 03/02/2024 01:10, Konrad Dybcio wrote: > Now that the non-legacy form of OPP is supported within the UFS driver, > go ahead and switch to it, adding support for more intermediate freq/power > states. > > Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> > --- > Extracted out of: > https://lore.kernel.org/linux-arm-msm/15d2bd66-29f3-435b-8494-d82ec4036413@linaro.org/#t > > Changes since v1: > - Set the reference clock rate to 0 in opp entries, it doesn't support > ratesetting anyway. Confirmed UFS still works. > --- > arch/arm64/boot/dts/qcom/sm8550.dtsi | 50 +++++++++++++++++++++++++++++------- > 1 file changed, 41 insertions(+), 9 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi > index c89d8f3dad21..144e20edf237 100644 > --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi > @@ -1966,6 +1966,7 @@ ufs_mem_hc: ufs@1d84000 { > iommus = <&apps_smmu 0x60 0x0>; > dma-coherent; > > + operating-points-v2 = <&ufs_opp_table>; > interconnects = <&aggre1_noc MASTER_UFS_MEM 0 &mc_virt SLAVE_EBI1 0>, > <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_UFS_MEM_CFG 0>; > > @@ -1986,18 +1987,49 @@ ufs_mem_hc: ufs@1d84000 { > <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, > <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, > <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; > - freq-table-hz = > - <75000000 300000000>, > - <0 0>, > - <0 0>, > - <75000000 300000000>, > - <100000000 403000000>, > - <0 0>, > - <0 0>, > - <0 0>; > qcom,ice = <&ice>; > > status = "disabled"; > + > + ufs_opp_table: opp-table { > + compatible = "operating-points-v2"; > + > + opp-75000000 { > + opp-hz = /bits/ 64 <75000000>, > + /bits/ 64 <0>, > + /bits/ 64 <0>, > + /bits/ 64 <75000000>, > + /bits/ 64 <0>, > + /bits/ 64 <0>, > + /bits/ 64 <0>, > + /bits/ 64 <0>; > + required-opps = <&rpmhpd_opp_low_svs>; > + }; > + > + opp-150000000 { > + opp-hz = /bits/ 64 <150000000>, > + /bits/ 64 <0>, > + /bits/ 64 <0>, > + /bits/ 64 <150000000>, > + /bits/ 64 <0>, > + /bits/ 64 <0>, > + /bits/ 64 <0>, > + /bits/ 64 <0>; > + required-opps = <&rpmhpd_opp_svs>; > + }; > + > + opp-300000000 { > + opp-hz = /bits/ 64 <300000000>, > + /bits/ 64 <0>, > + /bits/ 64 <0>, > + /bits/ 64 <300000000>, > + /bits/ 64 <0>, > + /bits/ 64 <0>, > + /bits/ 64 <0>, > + /bits/ 64 <0>; > + required-opps = <&rpmhpd_opp_nom>; > + }; > + }; > }; > > ice: crypto@1d88000 { > > --- > base-commit: 076d56d74f17e625b3d63cf4743b3d7d02180379 > change-id: 20240203-topic-8550_ufs_oppv2-bb88d63a4c58 > > Best regards, Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD
On Sat, 03 Feb 2024 01:10:11 +0100, Konrad Dybcio wrote: > Now that the non-legacy form of OPP is supported within the UFS driver, > go ahead and switch to it, adding support for more intermediate freq/power > states. > > Applied, thanks! [1/1] arm64: dts: qcom: sm8550: Switch UFS from opp-table-hz to opp-v2 commit: 2f7be4caacd264b23f637f2e1d7dccf4f1e4f20e Best regards,
diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi index c89d8f3dad21..144e20edf237 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -1966,6 +1966,7 @@ ufs_mem_hc: ufs@1d84000 { iommus = <&apps_smmu 0x60 0x0>; dma-coherent; + operating-points-v2 = <&ufs_opp_table>; interconnects = <&aggre1_noc MASTER_UFS_MEM 0 &mc_virt SLAVE_EBI1 0>, <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_UFS_MEM_CFG 0>; @@ -1986,18 +1987,49 @@ ufs_mem_hc: ufs@1d84000 { <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; - freq-table-hz = - <75000000 300000000>, - <0 0>, - <0 0>, - <75000000 300000000>, - <100000000 403000000>, - <0 0>, - <0 0>, - <0 0>; qcom,ice = <&ice>; status = "disabled"; + + ufs_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-75000000 { + opp-hz = /bits/ 64 <75000000>, + /bits/ 64 <0>, + /bits/ 64 <0>, + /bits/ 64 <75000000>, + /bits/ 64 <0>, + /bits/ 64 <0>, + /bits/ 64 <0>, + /bits/ 64 <0>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-150000000 { + opp-hz = /bits/ 64 <150000000>, + /bits/ 64 <0>, + /bits/ 64 <0>, + /bits/ 64 <150000000>, + /bits/ 64 <0>, + /bits/ 64 <0>, + /bits/ 64 <0>, + /bits/ 64 <0>; + required-opps = <&rpmhpd_opp_svs>; + }; + + opp-300000000 { + opp-hz = /bits/ 64 <300000000>, + /bits/ 64 <0>, + /bits/ 64 <0>, + /bits/ 64 <300000000>, + /bits/ 64 <0>, + /bits/ 64 <0>, + /bits/ 64 <0>, + /bits/ 64 <0>; + required-opps = <&rpmhpd_opp_nom>; + }; + }; }; ice: crypto@1d88000 {
Now that the non-legacy form of OPP is supported within the UFS driver, go ahead and switch to it, adding support for more intermediate freq/power states. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> --- Extracted out of: https://lore.kernel.org/linux-arm-msm/15d2bd66-29f3-435b-8494-d82ec4036413@linaro.org/#t Changes since v1: - Set the reference clock rate to 0 in opp entries, it doesn't support ratesetting anyway. Confirmed UFS still works. --- arch/arm64/boot/dts/qcom/sm8550.dtsi | 50 +++++++++++++++++++++++++++++------- 1 file changed, 41 insertions(+), 9 deletions(-) --- base-commit: 076d56d74f17e625b3d63cf4743b3d7d02180379 change-id: 20240203-topic-8550_ufs_oppv2-bb88d63a4c58 Best regards,