| Message ID | 7dbbe13428273c5786ddff6ea7af6724fcdd4de8.1706796660.git.geert+renesas@glider.be (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | 775d3714d8644edf29ed53cb4ad7205e22fe9a9d |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | arm64: dts: renesas: r8a779h0/gray-hawk-single: Add I2C and EEPROM support | expand |
On Thu, Feb 01, 2024 at 03:14:33PM +0100, Geert Uytterhoeven wrote: > From: Hai Pham <hai.pham.ud@renesas.com> > > Add device nodes for the I2C Bus Interfaces on the Renesas R-Car V4M > (R8A779H0) SoC. > > Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> So far so good... Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> I assume DMA nodes are not there yet because you use these nodes for testing DMA when you enable the DMACs?
Hi Wolfram, On Sat, Feb 3, 2024 at 6:52 PM Wolfram Sang <wsa@kernel.org> wrote: > On Thu, Feb 01, 2024 at 03:14:33PM +0100, Geert Uytterhoeven wrote: > > From: Hai Pham <hai.pham.ud@renesas.com> > > > > Add device nodes for the I2C Bus Interfaces on the Renesas R-Car V4M > > (R8A779H0) SoC. > > > > Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> > > So far so good... > > Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Thanks! > I assume DMA nodes are not there yet because you use these nodes for > testing DMA when you enable the DMACs? Indeed, DMAC support is not yet included. Gr{oetje,eeting}s, Geert
diff --git a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi index f5a688e300d29a73..8121aadaf6999429 100644 --- a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi @@ -99,6 +99,62 @@ sysc: system-controller@e6180000 { #power-domain-cells = <1>; }; + i2c0: i2c@e6500000 { + compatible = "renesas,i2c-r8a779h0", + "renesas,rcar-gen4-i2c"; + reg = <0 0xe6500000 0 0x40>; + interrupts = <GIC_SPI 610 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 518>; + power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; + resets = <&cpg 518>; + i2c-scl-internal-delay-ns = <110>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c1: i2c@e6508000 { + compatible = "renesas,i2c-r8a779h0", + "renesas,rcar-gen4-i2c"; + reg = <0 0xe6508000 0 0x40>; + interrupts = <GIC_SPI 611 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 519>; + power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; + resets = <&cpg 519>; + i2c-scl-internal-delay-ns = <110>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c2: i2c@e6510000 { + compatible = "renesas,i2c-r8a779h0", + "renesas,rcar-gen4-i2c"; + reg = <0 0xe6510000 0 0x40>; + interrupts = <GIC_SPI 612 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 520>; + power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; + resets = <&cpg 520>; + i2c-scl-internal-delay-ns = <110>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c3: i2c@e66d0000 { + compatible = "renesas,i2c-r8a779h0", + "renesas,rcar-gen4-i2c"; + reg = <0 0xe66d0000 0 0x40>; + interrupts = <GIC_SPI 613 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 521>; + power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; + resets = <&cpg 521>; + i2c-scl-internal-delay-ns = <110>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + hscif0: serial@e6540000 { compatible = "renesas,hscif-r8a779h0", "renesas,rcar-gen4-hscif", "renesas,hscif";