Message ID | 20240103132852.298964-1-emil.renner.berthing@canonical.com (mailing list archive) |
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([2a01:4262:1ab:c:5af0:999b:bb78:7614]) by smtp.gmail.com with ESMTPSA id eu18-20020a170907299200b00a26e53be089sm9549873ejc.44.2024.01.03.05.28.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Jan 2024 05:28:53 -0800 (PST) From: Emil Renner Berthing <emil.renner.berthing@canonical.com> To: linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org Cc: Linus Walleij <linus.walleij@linaro.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Jisheng Zhang <jszhang@kernel.org>, Guo Ren <guoren@kernel.org>, Fu Wei <wefu@redhat.com>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Drew Fustini <dfustini@baylibre.com> Subject: [PATCH v2 0/8] Add T-Head TH1520 SoC pin control Date: Wed, 3 Jan 2024 14:28:37 +0100 Message-ID: <20240103132852.298964-1-emil.renner.berthing@canonical.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240103_052903_464849_5EA6B75E X-CRM114-Status: GOOD ( 18.77 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: <linux-riscv.lists.infradead.org> List-Unsubscribe: <http://lists.infradead.org/mailman/options/linux-riscv>, <mailto:linux-riscv-request@lists.infradead.org?subject=unsubscribe> List-Archive: <http://lists.infradead.org/pipermail/linux-riscv/> List-Post: <mailto:linux-riscv@lists.infradead.org> List-Help: <mailto:linux-riscv-request@lists.infradead.org?subject=help> List-Subscribe: <http://lists.infradead.org/mailman/listinfo/linux-riscv>, <mailto:linux-riscv-request@lists.infradead.org?subject=subscribe> Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" <linux-riscv-bounces@lists.infradead.org> Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org |
Series |
Add T-Head TH1520 SoC pin control
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On Wed, Jan 03, 2024 at 02:28:37PM +0100, Emil Renner Berthing wrote: > This adds a pin control driver for the T-Head TH1520 RISC-V SoC used on > the Lichee Pi 4A and BeagleV Ahead boards and updates the device trees > to make use of it. I'm gonna mark the bits of this that apply to me as "superseded", albeit somewhat preemptive, since you'll need to resubmit the bindings patch. Cheers, Conor.
Hello,
Thanks for this series, it works with the I2C and the PWM.
Tested-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
Thomas