| Message ID | 20240105-topic-venus_reset-v2-3-c37eba13b5ce@linaro.org (mailing list archive) |
|---|---|
| State | Awaiting Upstream, archived |
| Headers | show |
| Series | Qualcomm GCC/VIDEOCC reset overhaul for Venus | expand |
On Tue, Feb 06, 2024 at 07:43:36PM +0100, Konrad Dybcio wrote: > Trying to toggle the resets in a rapid fashion can lead to the changes > not actually arriving at the clock controller block when we expect them > to. This was observed at least on SM8250. > > Read back the value after regmap_update_bits to ensure write completion. > > Fixes: db1029814f1f ("clk: qcom: reset: Ensure write completion on reset de/assertion") This commit does not exist in mainline or linux-next it seems. Johan
On 7.02.2024 10:07, Johan Hovold wrote: > On Tue, Feb 06, 2024 at 07:43:36PM +0100, Konrad Dybcio wrote: >> Trying to toggle the resets in a rapid fashion can lead to the changes >> not actually arriving at the clock controller block when we expect them >> to. This was observed at least on SM8250. >> >> Read back the value after regmap_update_bits to ensure write completion. >> >> Fixes: db1029814f1f ("clk: qcom: reset: Ensure write completion on reset de/assertion") > > This commit does not exist in mainline or linux-next it seems. Yeah, I managed to copy the last and not the first commit hash concerning reset.c :/ Konrad
diff --git a/drivers/clk/qcom/reset.c b/drivers/clk/qcom/reset.c index 20d1d35aaf22..d96c96a9089f 100644 --- a/drivers/clk/qcom/reset.c +++ b/drivers/clk/qcom/reset.c @@ -33,7 +33,12 @@ static int qcom_reset_set_assert(struct reset_controller_dev *rcdev, map = &rst->reset_map[id]; mask = map->bitmask ? map->bitmask : BIT(map->bit); - return regmap_update_bits(rst->regmap, map->reg, mask, assert ? mask : 0); + regmap_update_bits(rst->regmap, map->reg, mask, assert ? mask : 0); + + /* Read back the register to ensure write completion, ignore the value */ + regmap_read(rst->regmap, map->reg, &mask); + + return 0; } static int qcom_reset_assert(struct reset_controller_dev *rcdev, unsigned long id)
Trying to toggle the resets in a rapid fashion can lead to the changes not actually arriving at the clock controller block when we expect them to. This was observed at least on SM8250. Read back the value after regmap_update_bits to ensure write completion. Fixes: db1029814f1f ("clk: qcom: reset: Ensure write completion on reset de/assertion") Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> --- drivers/clk/qcom/reset.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-)