| Message ID | 20240115135649.708536-1-vidyas@nvidia.com (mailing list archive) |
|---|---|
| State | Handled Elsewhere |
| Headers | show |
| Series | [V4] PCI/MSI: Fix MSI hwirq truncation | expand |
Hi Thomas, Does this patch look fine to you? If yes, would you mind giving an Ack? Thanks, Vidya Sagar On 1/15/2024 7:26 PM, Vidya Sagar wrote: > While calculating the hwirq number for an MSI interrupt, the higher > bits (i.e. from bit-5 onwards a.k.a domain_nr >= 32) of the PCI domain > number gets truncated because of the shifted value casting to return > type of pci_domain_nr() which is 'int'. This for example is resulting > in same hwirq number for devices 0019:00:00.0 and 0039:00:00.0. > > So, cast the PCI domain number to 'irq_hw_number_t' before left shifting > it to calculate hwirq number. Please note that this fixes the issue only > on 64-bit systems and doesn't change the behavior in 32-bit systems i.e. > the 32-bit systems continue to have the issue. Since the issue surfaces > only if there are too many PCIe controllers in the system which usually > is the case in modern server systems and they don't tend to run 32-bit > kernels. > > Fixes: 3878eaefb89a ("PCI/MSI: Enhance core to support hierarchy irqdomain") > Tested-by: Shanker Donthineni <sdonthineni@nvidia.com> > Signed-off-by: Vidya Sagar <vidyas@nvidia.com> > --- > V4: > * Added extra information in the change log about the impact of this patch > in a 32-bit system as suggested by Thomas > > V3: > * Addressed review comments from Thomas Gleixner > * Added Tested-By: Shanker Donthineni <sdonthineni@nvidia.com> > > V2: > * Added Fixes tag > > drivers/pci/msi/irqdomain.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/pci/msi/irqdomain.c b/drivers/pci/msi/irqdomain.c > index c8be056c248d..cfd84a899c82 100644 > --- a/drivers/pci/msi/irqdomain.c > +++ b/drivers/pci/msi/irqdomain.c > @@ -61,7 +61,7 @@ static irq_hw_number_t pci_msi_domain_calc_hwirq(struct msi_desc *desc) > > return (irq_hw_number_t)desc->msi_index | > pci_dev_id(dev) << 11 | > - (pci_domain_nr(dev->bus) & 0xFFFFFFFF) << 27; > + ((irq_hw_number_t)(pci_domain_nr(dev->bus) & 0xFFFFFFFF)) << 27; > } > > static void pci_msi_domain_set_desc(msi_alloc_info_t *arg,
Hi Thomas, Sorry to bother you. Would you mind giving an Ack to this patch? Thanks, Vidya Sagar On 1/23/2024 9:31 PM, Vidya Sagar wrote: > Hi Thomas, > Does this patch look fine to you? > If yes, would you mind giving an Ack? > > Thanks, > Vidya Sagar > > On 1/15/2024 7:26 PM, Vidya Sagar wrote: >> While calculating the hwirq number for an MSI interrupt, the higher >> bits (i.e. from bit-5 onwards a.k.a domain_nr >= 32) of the PCI domain >> number gets truncated because of the shifted value casting to return >> type of pci_domain_nr() which is 'int'. This for example is resulting >> in same hwirq number for devices 0019:00:00.0 and 0039:00:00.0. >> >> So, cast the PCI domain number to 'irq_hw_number_t' before left shifting >> it to calculate hwirq number. Please note that this fixes the issue only >> on 64-bit systems and doesn't change the behavior in 32-bit systems i.e. >> the 32-bit systems continue to have the issue. Since the issue surfaces >> only if there are too many PCIe controllers in the system which usually >> is the case in modern server systems and they don't tend to run 32-bit >> kernels. >> >> Fixes: 3878eaefb89a ("PCI/MSI: Enhance core to support hierarchy >> irqdomain") >> Tested-by: Shanker Donthineni <sdonthineni@nvidia.com> >> Signed-off-by: Vidya Sagar <vidyas@nvidia.com> >> --- >> V4: >> * Added extra information in the change log about the impact of this >> patch >> in a 32-bit system as suggested by Thomas >> >> V3: >> * Addressed review comments from Thomas Gleixner >> * Added Tested-By: Shanker Donthineni <sdonthineni@nvidia.com> >> >> V2: >> * Added Fixes tag >> >> drivers/pci/msi/irqdomain.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/drivers/pci/msi/irqdomain.c b/drivers/pci/msi/irqdomain.c >> index c8be056c248d..cfd84a899c82 100644 >> --- a/drivers/pci/msi/irqdomain.c >> +++ b/drivers/pci/msi/irqdomain.c >> @@ -61,7 +61,7 @@ static irq_hw_number_t >> pci_msi_domain_calc_hwirq(struct msi_desc *desc) >> return (irq_hw_number_t)desc->msi_index | >> pci_dev_id(dev) << 11 | >> - (pci_domain_nr(dev->bus) & 0xFFFFFFFF) << 27; >> + ((irq_hw_number_t)(pci_domain_nr(dev->bus) & 0xFFFFFFFF)) << 27; >> } >> static void pci_msi_domain_set_desc(msi_alloc_info_t *arg,
Hi Thomas / Bjorn, Can you please guide me on getting this patch merged? Thanks, Vidya Sagar On 1/31/2024 8:45 AM, Vidya Sagar wrote: > Hi Thomas, > Sorry to bother you. > Would you mind giving an Ack to this patch? > > Thanks, > Vidya Sagar > > On 1/23/2024 9:31 PM, Vidya Sagar wrote: >> Hi Thomas, >> Does this patch look fine to you? >> If yes, would you mind giving an Ack? >> >> Thanks, >> Vidya Sagar >> >> On 1/15/2024 7:26 PM, Vidya Sagar wrote: >>> While calculating the hwirq number for an MSI interrupt, the higher >>> bits (i.e. from bit-5 onwards a.k.a domain_nr >= 32) of the PCI domain >>> number gets truncated because of the shifted value casting to return >>> type of pci_domain_nr() which is 'int'. This for example is resulting >>> in same hwirq number for devices 0019:00:00.0 and 0039:00:00.0. >>> >>> So, cast the PCI domain number to 'irq_hw_number_t' before left shifting >>> it to calculate hwirq number. Please note that this fixes the issue only >>> on 64-bit systems and doesn't change the behavior in 32-bit systems i.e. >>> the 32-bit systems continue to have the issue. Since the issue surfaces >>> only if there are too many PCIe controllers in the system which usually >>> is the case in modern server systems and they don't tend to run 32-bit >>> kernels. >>> >>> Fixes: 3878eaefb89a ("PCI/MSI: Enhance core to support hierarchy >>> irqdomain") >>> Tested-by: Shanker Donthineni <sdonthineni@nvidia.com> >>> Signed-off-by: Vidya Sagar <vidyas@nvidia.com> >>> --- >>> V4: >>> * Added extra information in the change log about the impact of this >>> patch >>> in a 32-bit system as suggested by Thomas >>> >>> V3: >>> * Addressed review comments from Thomas Gleixner >>> * Added Tested-By: Shanker Donthineni <sdonthineni@nvidia.com> >>> >>> V2: >>> * Added Fixes tag >>> >>> drivers/pci/msi/irqdomain.c | 2 +- >>> 1 file changed, 1 insertion(+), 1 deletion(-) >>> >>> diff --git a/drivers/pci/msi/irqdomain.c b/drivers/pci/msi/irqdomain.c >>> index c8be056c248d..cfd84a899c82 100644 >>> --- a/drivers/pci/msi/irqdomain.c >>> +++ b/drivers/pci/msi/irqdomain.c >>> @@ -61,7 +61,7 @@ static irq_hw_number_t >>> pci_msi_domain_calc_hwirq(struct msi_desc *desc) >>> return (irq_hw_number_t)desc->msi_index | >>> pci_dev_id(dev) << 11 | >>> - (pci_domain_nr(dev->bus) & 0xFFFFFFFF) << 27; >>> + ((irq_hw_number_t)(pci_domain_nr(dev->bus) & 0xFFFFFFFF)) << >>> 27; >>> } >>> static void pci_msi_domain_set_desc(msi_alloc_info_t *arg,
On Wed, Feb 07 2024 at 12:29, Vidya Sagar wrote: > Hi Thomas / Bjorn, > Can you please guide me on getting this patch merged? It's in my backlog...
diff --git a/drivers/pci/msi/irqdomain.c b/drivers/pci/msi/irqdomain.c index c8be056c248d..cfd84a899c82 100644 --- a/drivers/pci/msi/irqdomain.c +++ b/drivers/pci/msi/irqdomain.c @@ -61,7 +61,7 @@ static irq_hw_number_t pci_msi_domain_calc_hwirq(struct msi_desc *desc) return (irq_hw_number_t)desc->msi_index | pci_dev_id(dev) << 11 | - (pci_domain_nr(dev->bus) & 0xFFFFFFFF) << 27; + ((irq_hw_number_t)(pci_domain_nr(dev->bus) & 0xFFFFFFFF)) << 27; } static void pci_msi_domain_set_desc(msi_alloc_info_t *arg,
While calculating the hwirq number for an MSI interrupt, the higher bits (i.e. from bit-5 onwards a.k.a domain_nr >= 32) of the PCI domain number gets truncated because of the shifted value casting to return type of pci_domain_nr() which is 'int'. This for example is resulting in same hwirq number for devices 0019:00:00.0 and 0039:00:00.0. So, cast the PCI domain number to 'irq_hw_number_t' before left shifting it to calculate hwirq number. Please note that this fixes the issue only on 64-bit systems and doesn't change the behavior in 32-bit systems i.e. the 32-bit systems continue to have the issue. Since the issue surfaces only if there are too many PCIe controllers in the system which usually is the case in modern server systems and they don't tend to run 32-bit kernels. Fixes: 3878eaefb89a ("PCI/MSI: Enhance core to support hierarchy irqdomain") Tested-by: Shanker Donthineni <sdonthineni@nvidia.com> Signed-off-by: Vidya Sagar <vidyas@nvidia.com> --- V4: * Added extra information in the change log about the impact of this patch in a 32-bit system as suggested by Thomas V3: * Addressed review comments from Thomas Gleixner * Added Tested-By: Shanker Donthineni <sdonthineni@nvidia.com> V2: * Added Fixes tag drivers/pci/msi/irqdomain.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)