Message ID | 20231230172351.574091-7-michael.roth@amd.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Add AMD Secure Nested Paging (SEV-SNP) Hypervisor Support | expand |
On Sat, Dec 30, 2023, Michael Roth wrote: > In some cases the full 64-bit error code for the KVM page fault will be > needed to determine things like whether or not a fault was for a private > or shared guest page, so update related code to accept the full 64-bit > value so it can be plumbed all the way through to where it is needed. > > The accessors of fault->error_code are changed as follows: > > - FNAME(page_fault): change to explicitly use lower_32_bits() since that > is no longer done in kvm_mmu_page_fault() > - kvm_mmu_page_fault(): explicit mask with PFERR_RSVD_MASK, > PFERR_NESTED_GUEST_PAGE > - mmutrace: changed u32 -> u64 > > Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com> > Link: https://lore.kernel.org/kvm/20230612042559.375660-1-michael.roth@amd.com/T/#mbd0b20c9a2cf50319d5d2a27b63f73c772112076 > [mdr: drop references/changes to code not in current gmem tree, update > commit message] > Signed-off-by: Michael Roth <michael.roth@amd.com> I assume Isaku is the original author? If so, that's missing from this patch.
On Tue, Feb 6, 2024 at 9:52 PM Sean Christopherson <seanjc@google.com> wrote: > > On Sat, Dec 30, 2023, Michael Roth wrote: > > In some cases the full 64-bit error code for the KVM page fault will be > > needed to determine things like whether or not a fault was for a private > > or shared guest page, so update related code to accept the full 64-bit > > value so it can be plumbed all the way through to where it is needed. > > > > The accessors of fault->error_code are changed as follows: > > > > - FNAME(page_fault): change to explicitly use lower_32_bits() since that > > is no longer done in kvm_mmu_page_fault() > > - kvm_mmu_page_fault(): explicit mask with PFERR_RSVD_MASK, > > PFERR_NESTED_GUEST_PAGE > > - mmutrace: changed u32 -> u64 > > > > Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com> > > Link: https://lore.kernel.org/kvm/20230612042559.375660-1-michael.roth@amd.com/T/#mbd0b20c9a2cf50319d5d2a27b63f73c772112076 > > [mdr: drop references/changes to code not in current gmem tree, update > > commit message] > > Signed-off-by: Michael Roth <michael.roth@amd.com> > > I assume Isaku is the original author? If so, that's missing from this patch. The root of this patch seem to be in a reply to "KVM: x86: Add 'fault_is_private' x86 op" (https://patchew.org/linux/20230220183847.59159-1-michael.roth@amd.com/20230220183847.59159-2-michael.roth@amd.com/), so yes. Paolo
On Mon, Feb 12, 2024 at 11:00:27AM +0100, Paolo Bonzini wrote: > On Tue, Feb 6, 2024 at 9:52 PM Sean Christopherson <seanjc@google.com> wrote: > > > > On Sat, Dec 30, 2023, Michael Roth wrote: > > > In some cases the full 64-bit error code for the KVM page fault will be > > > needed to determine things like whether or not a fault was for a private > > > or shared guest page, so update related code to accept the full 64-bit > > > value so it can be plumbed all the way through to where it is needed. > > > > > > The accessors of fault->error_code are changed as follows: > > > > > > - FNAME(page_fault): change to explicitly use lower_32_bits() since that > > > is no longer done in kvm_mmu_page_fault() > > > - kvm_mmu_page_fault(): explicit mask with PFERR_RSVD_MASK, > > > PFERR_NESTED_GUEST_PAGE > > > - mmutrace: changed u32 -> u64 > > > > > > Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com> > > > Link: https://lore.kernel.org/kvm/20230612042559.375660-1-michael.roth@amd.com/T/#mbd0b20c9a2cf50319d5d2a27b63f73c772112076 > > > [mdr: drop references/changes to code not in current gmem tree, update > > > commit message] > > > Signed-off-by: Michael Roth <michael.roth@amd.com> > > > > I assume Isaku is the original author? If so, that's missing from this patch. > > The root of this patch seem to be in a reply to "KVM: x86: Add > 'fault_is_private' x86 op" > (https://patchew.org/linux/20230220183847.59159-1-michael.roth@amd.com/20230220183847.59159-2-michael.roth@amd.com/), > so yes. Yes this is Isaku's patch, I think the authorship got mangled during a rebase. I'll make sure to get that fixed up. -Mike > > Paolo >
diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c index 3c844e428684..d3fbfe0686a0 100644 --- a/arch/x86/kvm/mmu/mmu.c +++ b/arch/x86/kvm/mmu/mmu.c @@ -5813,8 +5813,7 @@ int noinline kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 err } if (r == RET_PF_INVALID) { - r = kvm_mmu_do_page_fault(vcpu, cr2_or_gpa, - lower_32_bits(error_code), false, + r = kvm_mmu_do_page_fault(vcpu, cr2_or_gpa, error_code, false, &emulation_type); if (KVM_BUG_ON(r == RET_PF_INVALID, vcpu->kvm)) return -EIO; diff --git a/arch/x86/kvm/mmu/mmu_internal.h b/arch/x86/kvm/mmu/mmu_internal.h index 0669a8a668ca..21f55e8b4dc6 100644 --- a/arch/x86/kvm/mmu/mmu_internal.h +++ b/arch/x86/kvm/mmu/mmu_internal.h @@ -190,7 +190,7 @@ static inline bool is_nx_huge_page_enabled(struct kvm *kvm) struct kvm_page_fault { /* arguments to kvm_mmu_do_page_fault. */ const gpa_t addr; - const u32 error_code; + const u64 error_code; const bool prefetch; /* Derived from error_code. */ @@ -280,7 +280,7 @@ enum { }; static inline int kvm_mmu_do_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, - u32 err, bool prefetch, int *emulation_type) + u64 err, bool prefetch, int *emulation_type) { struct kvm_page_fault fault = { .addr = cr2_or_gpa, diff --git a/arch/x86/kvm/mmu/mmutrace.h b/arch/x86/kvm/mmu/mmutrace.h index ae86820cef69..195d98bc8de8 100644 --- a/arch/x86/kvm/mmu/mmutrace.h +++ b/arch/x86/kvm/mmu/mmutrace.h @@ -260,7 +260,7 @@ TRACE_EVENT( TP_STRUCT__entry( __field(int, vcpu_id) __field(gpa_t, cr2_or_gpa) - __field(u32, error_code) + __field(u64, error_code) __field(u64 *, sptep) __field(u64, old_spte) __field(u64, new_spte) diff --git a/arch/x86/kvm/mmu/paging_tmpl.h b/arch/x86/kvm/mmu/paging_tmpl.h index 4d4e98fe4f35..c418f3b1cfca 100644 --- a/arch/x86/kvm/mmu/paging_tmpl.h +++ b/arch/x86/kvm/mmu/paging_tmpl.h @@ -787,7 +787,7 @@ static int FNAME(page_fault)(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault * The bit needs to be cleared before walking guest page tables. */ r = FNAME(walk_addr)(&walker, vcpu, fault->addr, - fault->error_code & ~PFERR_RSVD_MASK); + lower_32_bits(fault->error_code) & ~PFERR_RSVD_MASK); /* * The page is not mapped by the guest. Let the guest handle it.