| Message ID | 20240208124300.2740313-12-claudiu.beznea.uj@bp.renesas.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | clk: renesas: rzg2l: Add support for power domains | expand |
Hi Claudiu, On Thu, Feb 8, 2024 at 1:44 PM Claudiu <claudiu.beznea@tuxon.dev> wrote: > From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > > Instantiate always-on power domain for R9A09G011 SoC. At the moment, all > the IPs are part of this domain. > > Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> As not all IPs are part of the always-on domain, I'd rather defer this until all domains are handled in the driver. Note that RZ/V2M does not have CPG_BUS_*_MSTOP registers, but uses the Internal Power Domain Controller (PMC). Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
diff --git a/drivers/clk/renesas/r9a09g011-cpg.c b/drivers/clk/renesas/r9a09g011-cpg.c index dda9f29dff33..9d090075f3be 100644 --- a/drivers/clk/renesas/r9a09g011-cpg.c +++ b/drivers/clk/renesas/r9a09g011-cpg.c @@ -245,6 +245,11 @@ static const unsigned int r9a09g011_crit_mod_clks[] __initconst = { MOD_CLK_BASE + R9A09G011_URT_PCLK, }; +static const struct rzg2l_cpg_pm_domain_init_data r9a09g011_pm_domains[] = { + DEF_PD("always-on", R9A09G011_PD_ALWAYS_ON, 0, 0, + RZG2L_PD_F_PARENT | RZG2L_PD_F_ALWAYS_ON), +}; + const struct rzg2l_cpg_info r9a09g011_cpg_info = { /* Core Clocks */ .core_clks = r9a09g011_core_clks, @@ -265,5 +270,9 @@ const struct rzg2l_cpg_info r9a09g011_cpg_info = { .resets = r9a09g011_resets, .num_resets = ARRAY_SIZE(r9a09g011_resets), + /* PM domains */ + .pm_domains = r9a09g011_pm_domains, + .num_pm_domains = ARRAY_SIZE(r9a09g011_pm_domains), + .has_clk_mon_regs = false, };