| Message ID | 20240218-hfpll-yaml-v2-3-31543e0d6261@z3ntu.xyz (mailing list archive) |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | Convert qcom,hfpll documentation to yaml + related changes | expand |
On Sun, 18 Feb 2024 at 22:58, Luca Weiss <luca@z3ntu.xyz> wrote: > > Follow the updated bindings and use a QCS404-specific compatible for the > HFPLL on this SoC. > > Signed-off-by: Luca Weiss <luca@z3ntu.xyz> > --- > Please note that this patch should only land after the patch for the > clock driver. > --- > arch/arm64/boot/dts/qcom/qcs404.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
On 18/02/2024 21:57, Luca Weiss wrote: > Follow the updated bindings and use a QCS404-specific compatible for the > HFPLL on this SoC. > > Signed-off-by: Luca Weiss <luca@z3ntu.xyz> > --- > Please note that this patch should only land after the patch for the > clock driver. > --- This patch should go in the next cycle, after clock driver is merged to mainline, to preserve bisectability. Best regards, Krzysztof
diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index 2f2eeaf2e945..4133d5a19deb 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -1308,7 +1308,7 @@ apcs_glb: mailbox@b011000 { }; apcs_hfpll: clock-controller@b016000 { - compatible = "qcom,hfpll"; + compatible = "qcom,qcs404-hfpll"; reg = <0x0b016000 0x30>; #clock-cells = <0>; clock-output-names = "apcs_hfpll";
Follow the updated bindings and use a QCS404-specific compatible for the HFPLL on this SoC. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> --- Please note that this patch should only land after the patch for the clock driver. --- arch/arm64/boot/dts/qcom/qcs404.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)