| Message ID | 20240208091414.28133-1-yi.l.liu@intel.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 1f0198fce68340e0da2d438f4ea9fc20d2c958da |
| Headers | show |
| Series | iommu/vt-d: Set SSADE when attaching to a parent with dirty tracking | expand |
On 08/02/2024 09:14, Yi Liu wrote: > Should set the SSADE (Second Stage Access/Dirty bit Enable) bit of the > pasid entry when attaching a device to a nested domain if its parent > has already enabled dirty tracking. > > Fixes: 111bf85c68f6 ("iommu/vt-d: Add helper to setup pasid nested translation") > Signed-off-by: Yi Liu <yi.l.liu@intel.com> Reviewed-by: Joao Martins <joao.m.martins@oracle.com> > --- > base commit: 547ab8fc4cb04a1a6b34377dd8fad34cd2c8a8e3 > --- > drivers/iommu/intel/pasid.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/iommu/intel/pasid.c b/drivers/iommu/intel/pasid.c > index 3239cefa4c33..9be24bb762cf 100644 > --- a/drivers/iommu/intel/pasid.c > +++ b/drivers/iommu/intel/pasid.c > @@ -658,6 +658,8 @@ int intel_pasid_setup_nested(struct intel_iommu *iommu, struct device *dev, > pasid_set_domain_id(pte, did); > pasid_set_address_width(pte, s2_domain->agaw); > pasid_set_page_snoop(pte, !!ecap_smpwc(iommu->ecap)); > + if (s2_domain->dirty_tracking) > + pasid_set_ssade(pte); > pasid_set_translation_type(pte, PASID_ENTRY_PGTT_NESTED); > pasid_set_present(pte); > spin_unlock(&iommu->lock);
On 2024/2/8 17:14, Yi Liu wrote: > Should set the SSADE (Second Stage Access/Dirty bit Enable) bit of the > pasid entry when attaching a device to a nested domain if its parent > has already enabled dirty tracking. > > Fixes: 111bf85c68f6 ("iommu/vt-d: Add helper to setup pasid nested translation") > Signed-off-by: Yi Liu <yi.l.liu@intel.com> > --- > base commit: 547ab8fc4cb04a1a6b34377dd8fad34cd2c8a8e3 > --- > drivers/iommu/intel/pasid.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/iommu/intel/pasid.c b/drivers/iommu/intel/pasid.c > index 3239cefa4c33..9be24bb762cf 100644 > --- a/drivers/iommu/intel/pasid.c > +++ b/drivers/iommu/intel/pasid.c > @@ -658,6 +658,8 @@ int intel_pasid_setup_nested(struct intel_iommu *iommu, struct device *dev, > pasid_set_domain_id(pte, did); > pasid_set_address_width(pte, s2_domain->agaw); > pasid_set_page_snoop(pte, !!ecap_smpwc(iommu->ecap)); > + if (s2_domain->dirty_tracking) > + pasid_set_ssade(pte); > pasid_set_translation_type(pte, PASID_ENTRY_PGTT_NESTED); > pasid_set_present(pte); > spin_unlock(&iommu->lock); The same fix should also be applied to the intel_pasid_setup_second() path. Specifically, if a second-stage domain with dirty tracking enabled attaches to a device, the corresponding entry in the pasid table should also have the SSADE bit set. Best regards, baolu
On 09/02/2024 02:40, Baolu Lu wrote: > On 2024/2/8 17:14, Yi Liu wrote: >> Should set the SSADE (Second Stage Access/Dirty bit Enable) bit of the >> pasid entry when attaching a device to a nested domain if its parent >> has already enabled dirty tracking. >> >> Fixes: 111bf85c68f6 ("iommu/vt-d: Add helper to setup pasid nested translation") >> Signed-off-by: Yi Liu <yi.l.liu@intel.com> >> --- >> base commit: 547ab8fc4cb04a1a6b34377dd8fad34cd2c8a8e3 >> --- >> drivers/iommu/intel/pasid.c | 2 ++ >> 1 file changed, 2 insertions(+) >> >> diff --git a/drivers/iommu/intel/pasid.c b/drivers/iommu/intel/pasid.c >> index 3239cefa4c33..9be24bb762cf 100644 >> --- a/drivers/iommu/intel/pasid.c >> +++ b/drivers/iommu/intel/pasid.c >> @@ -658,6 +658,8 @@ int intel_pasid_setup_nested(struct intel_iommu *iommu, >> struct device *dev, >> pasid_set_domain_id(pte, did); >> pasid_set_address_width(pte, s2_domain->agaw); >> pasid_set_page_snoop(pte, !!ecap_smpwc(iommu->ecap)); >> + if (s2_domain->dirty_tracking) >> + pasid_set_ssade(pte); >> pasid_set_translation_type(pte, PASID_ENTRY_PGTT_NESTED); >> pasid_set_present(pte); >> spin_unlock(&iommu->lock); > > The same fix should also be applied to the intel_pasid_setup_second() > path. Specifically, if a second-stage domain with dirty tracking enabled > attaches to a device, the corresponding entry in the pasid table should > also have the SSADE bit set. > I think that's already done, see below. /* * Set up the scalable mode pasid entry for second only translation type. */ int intel_pasid_setup_second_level(struct intel_iommu *iommu, struct dmar_domain *domain, struct device *dev, u32 pasid) { (...) pasid_clear_entry(pte); pasid_set_domain_id(pte, did); pasid_set_slptr(pte, pgd_val); pasid_set_address_width(pte, agaw); pasid_set_translation_type(pte, PASID_ENTRY_PGTT_SL_ONLY); pasid_set_fault_enable(pte); pasid_set_page_snoop(pte, !!ecap_smpwc(iommu->ecap)); if (domain->dirty_tracking) pasid_set_ssade(pte); (...) }
On 08/02/2024 10:31, Joao Martins wrote: > On 08/02/2024 09:14, Yi Liu wrote: >> Should set the SSADE (Second Stage Access/Dirty bit Enable) bit of the >> pasid entry when attaching a device to a nested domain if its parent >> has already enabled dirty tracking. >> >> Fixes: 111bf85c68f6 ("iommu/vt-d: Add helper to setup pasid nested translation") >> Signed-off-by: Yi Liu <yi.l.liu@intel.com> > > Reviewed-by: Joao Martins <joao.m.martins@oracle.com> > On a second thought, while the patch looks fine if this is what we wanna do, just a quick clarification on the why (that's also applicable to the last patch of your other series[0]). I am sure I am missing something :) Shouldn't the nested domain be subdued to whatever features guest idea of ecap/cap instead of host's view? Or is this because guest first-stage page table on Intel is supposed to be always-enabled dirty tracking (per SDM) ? If it's the latter, it probably should be sprinkled in the commit message(s). [0] https://lore.kernel.org/linux-iommu/20240208082307.15759-9-yi.l.liu@intel.com/ >> --- >> base commit: 547ab8fc4cb04a1a6b34377dd8fad34cd2c8a8e3 >> --- >> drivers/iommu/intel/pasid.c | 2 ++ >> 1 file changed, 2 insertions(+) >> >> diff --git a/drivers/iommu/intel/pasid.c b/drivers/iommu/intel/pasid.c >> index 3239cefa4c33..9be24bb762cf 100644 >> --- a/drivers/iommu/intel/pasid.c >> +++ b/drivers/iommu/intel/pasid.c >> @@ -658,6 +658,8 @@ int intel_pasid_setup_nested(struct intel_iommu *iommu, struct device *dev, >> pasid_set_domain_id(pte, did); >> pasid_set_address_width(pte, s2_domain->agaw); >> pasid_set_page_snoop(pte, !!ecap_smpwc(iommu->ecap)); >> + if (s2_domain->dirty_tracking) >> + pasid_set_ssade(pte); >> pasid_set_translation_type(pte, PASID_ENTRY_PGTT_NESTED); >> pasid_set_present(pte); >> spin_unlock(&iommu->lock); >
> From: Joao Martins <joao.m.martins@oracle.com> > Sent: Friday, February 9, 2024 6:36 PM > > On 08/02/2024 10:31, Joao Martins wrote: > > On 08/02/2024 09:14, Yi Liu wrote: > >> Should set the SSADE (Second Stage Access/Dirty bit Enable) bit of the > >> pasid entry when attaching a device to a nested domain if its parent > >> has already enabled dirty tracking. > >> > >> Fixes: 111bf85c68f6 ("iommu/vt-d: Add helper to setup pasid nested > translation") > >> Signed-off-by: Yi Liu <yi.l.liu@intel.com> > > > > Reviewed-by: Joao Martins <joao.m.martins@oracle.com> > > > On a second thought, while the patch looks fine if this is what we wanna do, > just a quick clarification on the why (that's also applicable to the last patch > of your other series[0]). I am sure I am missing something :) > > Shouldn't the nested domain be subdued to whatever features guest idea of > ecap/cap instead of host's view? Or is this because guest first-stage page > table > on Intel is supposed to be always-enabled dirty tracking (per SDM) ? If it's the > latter, it probably should be sprinkled in the commit message(s). > > [0] https://lore.kernel.org/linux-iommu/20240208082307.15759-9- > yi.l.liu@intel.com/ > first-stage dirty tracking is always enabled. but the real point here is that the host has enabled dirty-tracking in second-stage so when a device is attached to a nested domain on top of that second-stage we should set SSADE in the pasid entry for that device. even if there is a guest ecap/cap for first-stage dirty tracking that shouldn't affect the host setting for second-stage which is invisible to the guest.
diff --git a/drivers/iommu/intel/pasid.c b/drivers/iommu/intel/pasid.c index 3239cefa4c33..9be24bb762cf 100644 --- a/drivers/iommu/intel/pasid.c +++ b/drivers/iommu/intel/pasid.c @@ -658,6 +658,8 @@ int intel_pasid_setup_nested(struct intel_iommu *iommu, struct device *dev, pasid_set_domain_id(pte, did); pasid_set_address_width(pte, s2_domain->agaw); pasid_set_page_snoop(pte, !!ecap_smpwc(iommu->ecap)); + if (s2_domain->dirty_tracking) + pasid_set_ssade(pte); pasid_set_translation_type(pte, PASID_ENTRY_PGTT_NESTED); pasid_set_present(pte); spin_unlock(&iommu->lock);
Should set the SSADE (Second Stage Access/Dirty bit Enable) bit of the pasid entry when attaching a device to a nested domain if its parent has already enabled dirty tracking. Fixes: 111bf85c68f6 ("iommu/vt-d: Add helper to setup pasid nested translation") Signed-off-by: Yi Liu <yi.l.liu@intel.com> --- base commit: 547ab8fc4cb04a1a6b34377dd8fad34cd2c8a8e3 --- drivers/iommu/intel/pasid.c | 2 ++ 1 file changed, 2 insertions(+)