| Message ID | 20240216142024.1884258-5-mitulkumar.ajitkumar.golani@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Enable Adaptive Sync SDP Support for DP | expand |
On 2/16/2024 7:50 PM, Mitul Golani wrote: > Add necessary functions definitions to enable > and compute AS SDP data. The new `intel_dp_compute_as_sdp` > function computes AS SDP values based on the display > configuration, ensuring proper handling of Variable Refresh > Rate (VRR). > > --v2: > - Add DP_SDP_ADAPTIVE_SYNC to infoframe_type_to_idx().[Ankit] > - separate patch for intel_read/write_dp_sdp [Ankit]. > - _HSW_VIDEO_DIP_ASYNC_DATA_A should be from ADL onward [Ankit] > - To fix indentation [Ankit] > > --v3: > - Add VIDEO_DIP_ENABLE_AS_HSW flag to intel_dp_set_infoframes. > > --v4: > - Add HAS_VRR check before write as sdp. > > --v5: > - Add missed HAS_VRR check before read as sdp. > > --v6: > Use Adaptive Sync sink status, which can be > used as a check for read/write sdp. (Ankit) > > Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> > --- > drivers/gpu/drm/i915/display/intel_dp.c | 20 ++++++++++++++++++++ > 1 file changed, 20 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c > index d68fb9d45054..0759266e7bfb 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -2617,6 +2617,25 @@ static void intel_dp_compute_vsc_colorimetry(const struct intel_crtc_state *crtc > vsc->content_type = DP_CONTENT_TYPE_NOT_DEFINED; > } > > +static void intel_dp_compute_as_sdp(struct intel_dp *intel_dp, > + struct intel_crtc_state *crtc_state, > + const struct drm_connector_state *conn_state) > +{ > + struct drm_dp_as_sdp *as_sdp = &crtc_state->infoframes.as_sdp; > + struct intel_connector *connector = intel_dp->attached_connector; > + const struct drm_display_mode *adjusted_mode = > + &crtc_state->hw.adjusted_mode; > + int vrefresh = drm_mode_vrefresh(adjusted_mode); > + > + if (!intel_vrr_is_in_range(connector, vrefresh)) > + return; I think there should be 2 variables in crtc_state->vrras_sdp_enable and as_sdp_mode. as_sdp_enable to track, if we really need to send the as_sdp and the as_sdp_mode to track which mode we want (AVT/FAVT) We fill these in vrr_compute_config, along with other members like trans vrr_sync_start/end. Here we can check if as_sdp_enable is set, if not we return early. > + > + crtc_state->infoframes.enable |= intel_hdmi_infoframe_enable(DP_SDP_ADAPTIVE_SYNC); > + as_sdp->sdp_type = DP_SDP_ADAPTIVE_SYNC; > + as_sdp->length = 0x9; > + as_sdp->vtotal = adjusted_mode->vtotal; Here the as_sdp->operation_mode should be set which is computed in vrr_compute_config, as mentioned above. Other fields will depend on mode that is selected. Regards, Ankit > +} > + > static void intel_dp_compute_vsc_sdp(struct intel_dp *intel_dp, > struct intel_crtc_state *crtc_state, > const struct drm_connector_state *conn_state) > @@ -2942,6 +2961,7 @@ intel_dp_compute_config(struct intel_encoder *encoder, > g4x_dp_set_clock(encoder, pipe_config); > > intel_vrr_compute_config(pipe_config, conn_state); > + intel_dp_compute_as_sdp(intel_dp, pipe_config, conn_state); > intel_psr_compute_config(intel_dp, pipe_config, conn_state); > intel_dp_drrs_compute_config(connector, pipe_config, link_bpp_x16); > intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index d68fb9d45054..0759266e7bfb 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2617,6 +2617,25 @@ static void intel_dp_compute_vsc_colorimetry(const struct intel_crtc_state *crtc vsc->content_type = DP_CONTENT_TYPE_NOT_DEFINED; } +static void intel_dp_compute_as_sdp(struct intel_dp *intel_dp, + struct intel_crtc_state *crtc_state, + const struct drm_connector_state *conn_state) +{ + struct drm_dp_as_sdp *as_sdp = &crtc_state->infoframes.as_sdp; + struct intel_connector *connector = intel_dp->attached_connector; + const struct drm_display_mode *adjusted_mode = + &crtc_state->hw.adjusted_mode; + int vrefresh = drm_mode_vrefresh(adjusted_mode); + + if (!intel_vrr_is_in_range(connector, vrefresh)) + return; + + crtc_state->infoframes.enable |= intel_hdmi_infoframe_enable(DP_SDP_ADAPTIVE_SYNC); + as_sdp->sdp_type = DP_SDP_ADAPTIVE_SYNC; + as_sdp->length = 0x9; + as_sdp->vtotal = adjusted_mode->vtotal; +} + static void intel_dp_compute_vsc_sdp(struct intel_dp *intel_dp, struct intel_crtc_state *crtc_state, const struct drm_connector_state *conn_state) @@ -2942,6 +2961,7 @@ intel_dp_compute_config(struct intel_encoder *encoder, g4x_dp_set_clock(encoder, pipe_config); intel_vrr_compute_config(pipe_config, conn_state); + intel_dp_compute_as_sdp(intel_dp, pipe_config, conn_state); intel_psr_compute_config(intel_dp, pipe_config, conn_state); intel_dp_drrs_compute_config(connector, pipe_config, link_bpp_x16); intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
Add necessary functions definitions to enable and compute AS SDP data. The new `intel_dp_compute_as_sdp` function computes AS SDP values based on the display configuration, ensuring proper handling of Variable Refresh Rate (VRR). --v2: - Add DP_SDP_ADAPTIVE_SYNC to infoframe_type_to_idx().[Ankit] - separate patch for intel_read/write_dp_sdp [Ankit]. - _HSW_VIDEO_DIP_ASYNC_DATA_A should be from ADL onward [Ankit] - To fix indentation [Ankit] --v3: - Add VIDEO_DIP_ENABLE_AS_HSW flag to intel_dp_set_infoframes. --v4: - Add HAS_VRR check before write as sdp. --v5: - Add missed HAS_VRR check before read as sdp. --v6: Use Adaptive Sync sink status, which can be used as a check for read/write sdp. (Ankit) Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> --- drivers/gpu/drm/i915/display/intel_dp.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+)