| Message ID | 20240221-pcie-qcom-bridge-dts-v1-9-6c6df0f9450d@linaro.org (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Add PCIe bridge node in DT for Qcom SoCs | expand |
On 21.02.2024 04:41, Manivannan Sadhasivam wrote: > On Qcom SoCs, the PCIe host bridge is connected to a single PCIe bridge > for each controller instance. Hence, add a node to represent the bridge. > > While at it, let's remove the bridge properties from board dts as they are > now redundant. > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- > .../dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 8 ----- > arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 40 ++++++++++++++++++++++ > 2 files changed, 40 insertions(+), 8 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts > index def3976bd5bb..f0a0115e08fa 100644 > --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts > +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts > @@ -733,14 +733,6 @@ &pcie4 { > status = "okay"; > > pcie@0 { > - device_type = "pci"; > - reg = <0x0 0x0 0x0 0x0 0x0>; > - #address-cells = <3>; > - #size-cells = <2>; > - ranges; > - > - bus-range = <0x01 0xff>; > - > wifi@0 { This doesn't seem right, pleas use a label Konrad
On Wed, Feb 21, 2024 at 01:39:01PM +0100, Konrad Dybcio wrote: > On 21.02.2024 04:41, Manivannan Sadhasivam wrote: > > On Qcom SoCs, the PCIe host bridge is connected to a single PCIe bridge > > for each controller instance. Hence, add a node to represent the bridge. > > > > While at it, let's remove the bridge properties from board dts as they are > > now redundant. > > > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > > --- > > .../dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 8 ----- > > arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 40 ++++++++++++++++++++++ > > 2 files changed, 40 insertions(+), 8 deletions(-) > > > > diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts > > index def3976bd5bb..f0a0115e08fa 100644 > > --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts > > +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts > > @@ -733,14 +733,6 @@ &pcie4 { > > status = "okay"; > > > > pcie@0 { > > - device_type = "pci"; > > - reg = <0x0 0x0 0x0 0x0 0x0>; > > - #address-cells = <3>; > > - #size-cells = <2>; > > - ranges; > > - > > - bus-range = <0x01 0xff>; > > - > > wifi@0 { > > This doesn't seem right, pleas use a label > Why? A node label is useful if we want to reference it at the root level in board dts, but here it is not. - Mani
On Thu, Feb 22, 2024 at 11:09:58AM +0530, Manivannan Sadhasivam wrote: > On Wed, Feb 21, 2024 at 01:39:01PM +0100, Konrad Dybcio wrote: > > On 21.02.2024 04:41, Manivannan Sadhasivam wrote: > > > On Qcom SoCs, the PCIe host bridge is connected to a single PCIe bridge > > > for each controller instance. Hence, add a node to represent the bridge. > > > > > > While at it, let's remove the bridge properties from board dts as they are > > > now redundant. > > > > > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > > > --- > > > .../dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 8 ----- > > > arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 40 ++++++++++++++++++++++ > > > 2 files changed, 40 insertions(+), 8 deletions(-) > > > > > > diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts > > > index def3976bd5bb..f0a0115e08fa 100644 > > > --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts > > > +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts > > > @@ -733,14 +733,6 @@ &pcie4 { > > > status = "okay"; > > > > > > pcie@0 { > > > - device_type = "pci"; > > > - reg = <0x0 0x0 0x0 0x0 0x0>; > > > - #address-cells = <3>; > > > - #size-cells = <2>; > > > - ranges; > > > - > > > - bus-range = <0x01 0xff>; > > > - > > > wifi@0 { > > > > This doesn't seem right, pleas use a label > > > > Why? A node label is useful if we want to reference it at the root level in > board dts, but here it is not. > Giving the bridge a label and then adding wifi@0 as a child using that label in the dts is pretty much how we do for everything else. I find this over-flattening hard to follow, but relying on child node names when extending the structure or adding properties have bitten us many times in the past. As such, I think the desired result in the dts should be: &pcie4 { status = "okay"; }; &pcie4_bridge { wifi@0 { ... }; }; Regards, Bjorn > - Mani > > -- > மணிவண்ணன் சதாசிவம்
On Sun, Mar 17, 2024 at 10:37:15PM -0500, Bjorn Andersson wrote: > On Thu, Feb 22, 2024 at 11:09:58AM +0530, Manivannan Sadhasivam wrote: > > On Wed, Feb 21, 2024 at 01:39:01PM +0100, Konrad Dybcio wrote: > > > On 21.02.2024 04:41, Manivannan Sadhasivam wrote: > > > > On Qcom SoCs, the PCIe host bridge is connected to a single PCIe bridge > > > > for each controller instance. Hence, add a node to represent the bridge. > > > > > > > > While at it, let's remove the bridge properties from board dts as they are > > > > now redundant. > > > > > > > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > > > > --- > > > > .../dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 8 ----- > > > > arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 40 ++++++++++++++++++++++ > > > > 2 files changed, 40 insertions(+), 8 deletions(-) > > > > > > > > diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts > > > > index def3976bd5bb..f0a0115e08fa 100644 > > > > --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts > > > > +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts > > > > @@ -733,14 +733,6 @@ &pcie4 { > > > > status = "okay"; > > > > > > > > pcie@0 { > > > > - device_type = "pci"; > > > > - reg = <0x0 0x0 0x0 0x0 0x0>; > > > > - #address-cells = <3>; > > > > - #size-cells = <2>; > > > > - ranges; > > > > - > > > > - bus-range = <0x01 0xff>; > > > > - > > > > wifi@0 { > > > > > > This doesn't seem right, pleas use a label > > > > > > > Why? A node label is useful if we want to reference it at the root level in > > board dts, but here it is not. > > > > Giving the bridge a label and then adding wifi@0 as a child using that > label in the dts is pretty much how we do for everything else. > > I find this over-flattening hard to follow, but relying on child node > names when extending the structure or adding properties have bitten us > many times in the past. > > As such, I think the desired result in the dts should be: > > &pcie4 { > status = "okay"; > }; > > &pcie4_bridge { > wifi@0 { > ... > }; > }; > Ok. Will change it in next version. I'm also waiting to conclude on representing the PERST# and WAKE# properties properly in the schema [1]. Once that gets finalized, I'll respin v2. - Mani [1] https://github.com/devicetree-org/dt-schema/pull/126 > Regards, > Bjorn > > > - Mani > > > > -- > > மணிவண்ணன் சதாசிவம்
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts index def3976bd5bb..f0a0115e08fa 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts @@ -733,14 +733,6 @@ &pcie4 { status = "okay"; pcie@0 { - device_type = "pci"; - reg = <0x0 0x0 0x0 0x0 0x0>; - #address-cells = <3>; - #size-cells = <2>; - ranges; - - bus-range = <0x01 0xff>; - wifi@0 { compatible = "pci17cb,1103"; reg = <0x10000 0x0 0x0 0x0 0x0>; diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index febf28356ff8..37d9e01d7e4e 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -1779,6 +1779,16 @@ pcie4: pcie@1c00000 { phy-names = "pciephy"; status = "disabled"; + + pcie@0 { + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + bus-range = <0x01 0xff>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; }; pcie4_phy: phy@1c06000 { @@ -1877,6 +1887,16 @@ pcie3b: pcie@1c08000 { phy-names = "pciephy"; status = "disabled"; + + pcie@0 { + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + bus-range = <0x01 0xff>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; }; pcie3b_phy: phy@1c0e000 { @@ -1975,6 +1995,16 @@ pcie3a: pcie@1c10000 { phy-names = "pciephy"; status = "disabled"; + + pcie@0 { + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + bus-range = <0x01 0xff>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; }; pcie3a_phy: phy@1c14000 { @@ -2076,6 +2106,16 @@ pcie2b: pcie@1c18000 { phy-names = "pciephy"; status = "disabled"; + + pcie@0 { + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + bus-range = <0x01 0xff>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; }; pcie2b_phy: phy@1c1e000 {
On Qcom SoCs, the PCIe host bridge is connected to a single PCIe bridge for each controller instance. Hence, add a node to represent the bridge. While at it, let's remove the bridge properties from board dts as they are now redundant. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> --- .../dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 8 ----- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 40 ++++++++++++++++++++++ 2 files changed, 40 insertions(+), 8 deletions(-)